ICS9248-171 Datasheet, PDF (1/15 Pages) Integrated Circuit Systems – AMD - K7TM System Clock Chip

Integrated
Circuit
Systems, Inc.
AMD - K7™ System Clock Chip
Recommended Application:
ALI 1647 style chipset
Output Features:
• 1 - Differential pair open drain CPU clocks
• 1 - Single-ended open drain CPU clock
• 13 - SDRAM @ 3.3V
• 7 - PCI @3.3V
• 2 - AGP @ 3.3V
• 1 - 48MHz, @3.3V
• 1 - REF @3.3V, (selectable strength) through I²C
Features:
• Up to 147MHz frequency support
• Support power management: DG stop, PCI stop and
Power down Mode from I²C programming.
• Spread spectrum for EMI control (0 to -0.5% down
spread, ± 0.25% center spread).
• Uses external 14.318MHz crystal
Skew Specifications:
• CPUT - CPUC: <250ps
• PCI - PCI: <500ps
• CPU - SDRAM: <350ps
• SDRAM - SDRAM: <250ps
• AGP - AGP: <250ps
• PCI - AGP: <350ps
• CPU - PCI: <3ns
ICS9248-171
Advance Information
Pin Configuration
*DG_STOP#
1
*PD#
2
GND
3
X1
4
X2
5
AVDD
6
**FS0/REF0
7
VDD
8
**FS1/AGP0
9
AGP1
10
GND
11
*FS2/PCICLK_F
12
PCICLK0
13
PCICLK1
14
PCICLK2
15
GND
16
VDD
17
*MODE/PCICLK3
18
PCICLK4
19
PCICLK5
20
AVDD48
21
**FS3/48MHz
22
GND
23
SCLK
24
48
GND
47
CPUCLKT0
46
CPUCLKC0
45
CPUCLKT1
44
SDATA
43
SDRAM0
42
SDRAM1
41
GND
40
VDD
39
SDRAM2
38
SDRAM3
37
SDRAM4
36
SDRAM5
35
VDD
34
GND
33
SDRAM6
32
SDRAM7
31
SDRAM8
30
SDRAM9
29
GND
28
VDD
27
SDRAM10(PCI_STOP#)*
26
SDRAM11
25
SDRAM12
48-Pin 300mil SSOP &
240mil TSSOP package
Notes:
REF0 could be 1X or 2X strength controlled by I²C.
* Internal Pull-up Resistor of 120K to VDD
** Internal pull-down of 120K to GND.
Block Diagram
PLL2
X1
XTAL
X2
OSC
PLL1
Spread
Spectrum
SDATA
SCLK
FS (3:0)
PD#
PCI_STOP#
DG_STOP#
MODE
Control
Logic
Config.
Reg.
CPU
DIVDER
SDRAM
DIVDER
Stop
PCI
DIVDER
Stop
AGP
DIVDER
Stop
48MHz
REF0
CPUCLKT (1:0)
2
CPUCLKC0
SDRAM (12:0)
13
PCICLK (5:0)
6
PCICLK_F
AGP (1:0)
2
9248-171 Rev - 12/29/00
Third party brands and names are the property of their respective owners.
Functionality
FS3 FS2 FS1 FS0 CPU SDRAM
0
0
0
0 66.66 66.66
0
0
0
1 66.66 100.00
0
0
1
0 100.00 66.66
0
0
1
1 100.00 100.00
0
1
0
0 100.00 133.33
0
1
0
1 120.00 120.00
0
1
1
0 133.33 100.00
0
1
1
1 133.33 133.33
1
0
0
0 90.00 90.00
1
0
0
1 101.00 101.00
1
0
1
0 100.00 66.66
1
0
1
1 100.00 100.00
1
1
0
0 100.00 133.33
0
1
0
1 126.00 126.00
1
1
1
0 133.33 100.00
1
1
1
1 133.33 133.33
Power Groups
AVDD = Xtal, Core PLL
AVDD48 = 48MHz, Fixed PLL
ADVANCE INFORMATION documents contain information on products
in the formative or design phase development. Characteristic data and
other specifications are design goals. ICS reserves the right to change or
discontinue these products without notice.