ICS840002 Datasheet, PDF (1/13 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO LVCMOS/

Integrated
Circuit
Systems, Inc.
ICS840002I
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS840002I is a 2 output LVCMOS/LVTTL
ICS
Synthesizer optimized to generate Fibre Channel
HiPerClockS™ _{reference clock frequencies and is a member of}
the HiPerClocks^TM family of high performance
clock solutions from ICS. Using a 26.5625MHz
18pF parallel resonant crystal, the following frequencies can be
generated based on the 2 frequency select pins (F_SEL1:0):
212.5MHz, 159.375MHz, 156.25MHz, 106.25MHz, and
53.125MHz. The ICS840002I uses ICS’ 3^rd generation low phase
noise VCO technology and can achieve 1ps or lower typical
rms phase jitter, easily meeting Fibre Channel jitter requirements.
The ICS840002I is packaged in a 16-pin TSSOP package.
FREQUENCY SELECT FUNCTION TABLE
FEATURES
• Two LVCMOS outputs @ 3.3V, 17Ω typical output impedance
• Selectable crystal oscillator interface
or LVCMOS single-ended input
• Output frequency range: 46.66MHz - 233.33MHz
• VCO range: 560MHz - 700MHz
• Supports the following output frequencies: 212.5MHz,
159.375MHz, 156.25MHz, 106.25MHz and 53.125MHz
• RMS phase jitter @ 212.5MHz (637KHz - 10MHz):
0.83ps (typical)
Typical phase noise at 212.5MHz:
Offset
Noise Power
100Hz ............... -91.3 dBc/Hz
1KHz .............. -114.3 dBc/Hz
10KHz .............. -120.7 dBc/Hz
100KHz .............. -120.2 dBc/Hz
• Power supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
• -40°C to 85°C ambient operating temperature
• Lead-Free package RoHS compliant
Input Frequency
(MHz)
26.5625
26.5625
26.5625
26.5625
26.04166
F_SEL1
0
0
1
1
0
F_SEL0
0
1
0
1
1
Inputs
M Divider Value N Divider Value
24
3
24
4
24
6
24
12
24
4
M/N Ratio Value
8
6
4
2
6
Output Frequency
(MHz)
212.5
159.375
106.25
53.125
156.25
BLOCK DIAGRAM
OE ^Pullup
F_SEL1:0 ^{Pullup:Pullup}
nPLL_SEL ^Pulldown
nXTAL_SEL ^Pulldown
XTAL_IN ^26.5625MHz
OSC ⁰
XTAL_OUT
TEST_CLK ^Pulldown
1
2
Phase
Detector
VCO
F_SEL1:0
1
N
0 0 ÷3
0 1 ÷4
0
1 0 ÷6
1 1 ÷12 (default)
M = ÷24 (fixed)
PIN ASSIGNMENT
F_SEL0 1 16 F_SEL1
nXTAL_SEL 2 15 GND
TEST_CLK 3 14 GND
OE 4 13 Q0
MR 5 12 Q1
nPLL_SEL 6
1 1 VDDO
VDDA 7
10 XTAL_IN
VDD 8
9 XTAL_OUT
Q0
ICS840002I
16-Lead TSSOP
Q1 _{4.4mm x 5.0mm x 0.92mm}
package body
G Package
Top View
MR ^Pulldown
840002AGI
www.icst.com/products/hiperclocks.html
1
REV. A MARCH 10, 2005