ICS8312 Datasheet, PDF (1/12 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-12 LVCMOS / LVTTL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8312
LOW SKEW, 1-TO-12
LVCMOS / LVTTL FANOUT BUFFER
GENERAL DESCRIPTION
ICS
The ICS8312 is a low skew, 1-to-12 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockS™ _{HiPerClockS™family of High Performance Clock}
Solutions from ICS. The ICS8312 single ended
clock input accepts LVCMOS or LVTTL input lev-
els. The low impedance LVCMOS outputs are designed to
drive 50Ω series or parallel terminated transmission lines. The
effective fanout can be increased from 12 to 24 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply modes. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS8312 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
FEATURES
• 12 LVCMOS / LVTTL outputs
• LVCMOS / LVTTL clock input
• Maximum output frequency: 250MHz
• Output skew: 150ps (maximum)
• Operating supply modes:
Core/Output
3.3V/3.3V,
2.5V/2.5V,
1.8V/1.8V,
3.3V/2.5V,
3.3V/1.8V,
2.5V/1.8V
• 0°C to 85°C ambient operating temperature
• Lead-Free package available
• Industrial temperature information available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
CLK_EN
CLK
OE
nD
Q
LE
12
Q0:Q11
GND
VDD
CLK_EN
CLK
GND
OE
VDD
GND
32 31 30 29 28 27 26 25
1
24
2
23
3
22
4
ICS8312
21
5
20
6
19
7
18
8
17
9 10 11 12 13 14 15 16
Q4
VDDO
Q5
GND
Q6
VDDO
Q7
GND
32-Lead LQFP
7mm x 7mm x 1.4mm body package
Y Pacakge
Top View
8312AY
http://www.icst.com/products/hiperclocks.html
1
REV. C JUNE 14, 2004