ICS83052I Datasheet, PDF (1/12 Pages) Integrated Circuit Systems – 2:1, SINGLE-ENDED MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS83052I
2:1, SINGLE-ENDED MULTIPLEXER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
V_DDO
Power
Output supply pin.
2
GND
Power
Power supply ground.
3, 6
CLK1, CLK0 Input Pulldown Single-ended clock inputs. LVCMOS/LVTTL interface levels.
4
V_DD
Power
Core supply pin.
5
OE
Input
Pullup
Output enable. When LOW, outputs are in HIGH impedance state.
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
7
SEL0
Input
Pulldown
Clock select input. See Control Input Function Table.
LVCMOS / LVTTL interface levels.
8
Q
Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
C_PD
Power Dissipation Capacitance
(per output)
R_OUT
Output Impedance
Test Conditions
V_DDO = 3.465V
V_DDO = 2.625V
V_DDO = 1.89V
Minimum
Typical
4
51
51
18
19
19
15
Maximum
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
TABLE 3. CONTROL INPUT FUNCTION TABLE
Control Inputs
SEL0
0
1
Input Selected to Q
CLK0
CLK1
83052AGI
www.icst.com/products/hiperclocks.html
2
REV. A AUGUST 2, 2005