ICS552-02 Datasheet, PDF (1/6 Pages) Integrated Circuit Systems – LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER

ICS552-02
LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
Description
The ICS552-02 is a low skew, single-input to eight-
output clock buffer. It is part of ICS’ Clock Blocks^TM
family. See the ICS553 for a 1 to 4 low skew buffer. For
more than 8 outputs see the MK74CBxxx Buffalo^TM
series of clock drivers.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Features
• Extremely low skew outputs (50ps maximum)
• Packaged in 16 pin TSSOP
• Low power CMOS technology
• Operating Voltages of 2.5 V to 5 V
• Output Enable pin tri-states outputs
• 5 V tolerant input clocks
• Input/Output clock frequency up to 200 MHz
• Input clock multiplexer simplifies clock selection
Block Diagram
INA
1
INB
0
SELA
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
OE
MDS 552-02 B
1
Revision 050401
Integrated Circuit Systems q 525 Race Street, San Jose, CA 95126 q tel [phone] q www.icst.com