IC62LV12816DL Datasheet, PDF (6/12 Pages) Integrated Circuit Solution Inc – 128 K x 16 bit Low Voltage and Ultra Low Power CMOS Static RAM

IC62LV12816DL
IC62LV12816DLL
IC62LV12816DLL POWER SUPPLY CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
Test Conditions
-55
-70
-100
Min. Max. Min. Max. Min. Max. Unit
ICC
Vcc Dynamic Operating VCC = Max
Com. — 40
Supply Current
IOUT = 0 mA, f = fMAX
Ind. — 45
— 30
— 35
— 20
mA
— 25
ISB1 TTL Standby Current VCC = Max.,
Com. — 0.5
(TTL Inputs)
VIN = VIH or VIL,
Ind. — 1.0
CE1 = VIH, CE2 = VIL
— 0.5
— 1.0
— 0.5 mA
— 1.0
ISB2 CMOS Standby
VCC = Max., f = 0
Com. — 10
Current (CMOS Inputs) CE1 ≥ VCC – 0.2V,
Ind. — 15
or CE2 ≤ 0.2V
other input = 0-VCC, f = 0
OR
— 10
— 15
— 10
µA
— 15
ULB Control
VCC = Max., CE1 = VIL, CE2 = VIH
VIN ≤ 0.2V, f = 0, UB / LB = VCC – 0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-55
-70
-100
Min. Max.
Min. Max.
Min. Max.
Unit
tRC Read Cycle Time
55 —
70 —
100 —
ns
tAA Address Access Time
— 55
— 70
— 100
ns
tOHA
tACE
tDOE
tHZOE⁽²⁾
tLZOE⁽²⁾
tHZCE⁽²⁾
tLZCE⁽²⁾
tBA
tHZB
tLZB
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB o High-Z Output
LB. UB to Low-Z Output
10 —
— 55
— 30
— 20
5—
0 20
10 —
— 55
0 25
0—
10 —
— 70
— 35
— 25
5—
0 25
10 —
— 70
0 25
0—
15 —
ns
— 100
ns
— 50
ns
— 30
ns
5—
ns
0 30
ns
10 —
ns
— 100
ns
0 35
ns
0—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels
of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
6
Integrated Circuit Solution Inc.
LPSR025-0A 6/7/2002