IC62LV12816DL Datasheet, PDF (5/12 Pages) Integrated Circuit Solution Inc – 128 K x 16 bit Low Voltage and Ultra Low Power CMOS Static RAM

IC62LV12816DL
IC62LV12816DLL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0.4V to 2.2V
5 ns
1.3V
See Figures 1 and 2
AC TEST LOADS
OUTPUT
1 TTL
100 pF
Including
jig and
scope
Figure 1
OUTPUT
1 TTL
5 pF
Including
jig and
scope
Figure 2
IC62LV12816DL POWER SUPPLY CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
Test Conditions
-55
-70
-100
Min. Max. Min. Max. Min. Max. Unit
ICC
Vcc Dynamic Operating VCC = 3.0V.,
Com. — 40
Supply Current
IOUT = 0 mA, f = fMAX
Ind. — 45
— 30
— 35
— 20 mA
— 25
ISB1 TTL Standby Current VCC = Max.,
Com. — 0.5
(TTL Inputs)
VIN = VIH or VIL, f = 0
Ind. — 1.0
CE1 = VIH, CE2 = VIL
— 0.5
— 1.0
— 0.5 mA
— 1.0
ISB2 CMOS Standby
VCC = Max.,
Com. — 35
Current (CMOS Inputs) CE1 ≥ VCC – 0.2V,
Ind. — 50
or CE2 ≤ 0.2V
other input = 0-VCC, f = 0
OR
— 35
— 50
— 35
µA
— 50
ULB Control
VCC = Max., CE1 = VIL, CE2 = VIH
VIN ≤ 0.2V, f = 0, UB / LB = VCC – 0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Circuit Solution Inc.
5
LPSR025-0A 6/7/2002