IC61C1024 Datasheet, PDF (6/11 Pages) Integrated Circuit Solution Inc – 128K x 8 HIGH-SPEED CMOS STATIC RAM

IC61C1024
IC61C1024L
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-12⁽²⁾
Min. Max.
-15 ns
Min. Max.
-20 ns
Min. Max.
-25 ns
Min. Max. Unit
tRC Read Cycle Time
12 —
15 —
20 —
25 —
ns
tAA Address Access Time
— 12
— 15
— 20
— 25
ns
tOHA Output Hold Time
tACE1 CE1 Access Time
3—
— 12
3—
— 15
3—
— 20
3—
ns
— 25
ns
tACE2 CE2 Access Time
tDOE OE Access Time
tLZOE⁽³⁾ OE to Low-Z Output
tHZOE⁽³⁾ OE to High-Z Output
tLZCE1⁽³⁾ CE1 to Low-Z Output
— 12
—6
0—
06
2—
— 15
—7
0—
06
2—
— 20
—9
0—
07
3—
— 25
ns
—9
ns
0—
ns
0 10
ns
3—
ns
tLZCE2⁽³⁾ CE2 to Low-Z Output
2—
2—
3—
3—
ns
tHZCE⁽³⁾ CE1 or CE2 to High-Z Output
07
08
09
0 10
ns
tPU⁽⁴⁾ CE1 or CE2 to Power-Up
0—
0—
0—
0—
ns
tPD⁽⁴⁾ CE1 or CE2 to Power-Down
— 12
— 12
— 18
— 20
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. -12 ns device for IC61C1024 only.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
480 Ω
5V
OUTPUT
30 pF
Including
jig and
scope
Figure 1
6
255 Ω
480 Ω
5V
OUTPUT
5 pF
Including
jig and
scope
Figure 2
255 Ω
Integrated Circuit Solution Inc.
AHSR008-0B 10/18/2001