IC62C1024AL Datasheet, PDF (5/9 Pages) Integrated Circuit Solution Inc – 128K x 8 Low Power CMOS SRAM

IC62C1024AL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-35
Min. Max.
-45
Min. Max.
-55
Min. Max.
-70
Min. Max. Unit
tRC Read Cycle Time
35 —
45 —
55 —
70 —
ns
tAA Address Access Time
— 35
— 45
— 55
— 70
ns
tOHA Output Hold Time
tACE1 CE1 Access Time
3—
— 35
3—
— 45
3—
— 55
3—
ns
— 70
ns
tACE2 CE2 Access Time
tDOE OE Access Time
tLZOE⁽²⁾ OE to Low-Z Output
tHZOE⁽²⁾ OE to High-Z Output
tLZCE1⁽²⁾ CE1 to Low-Z Output
— 35
— 10
0—
0 10
3—
— 45
— 20
0—
0 15
5—
— 55
— 25
0—
0 20
7—
— 70
ns
— 35
ns
0—
ns
0 25
ns
10 —
ns
tLZCE2⁽²⁾ CE2 to Low-Z Output
tHZCE⁽²⁾ CE1 or CE2 to High-Z Output
3—
0 10
5—
0 15
7—
0 20
10 —
ns
0 25
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
5 ns
1.5V
See Figures 1a and 1b
AC TEST LOADS
480 Ω
5V
480 Ω
5V
OUTPUT
OUTPUT
100 pF
Including
jig and
scope
Figure 1a.
255 Ω
5 pF
Including
jig and
scope
Figure 1b.
255 Ω
Integrated Circuit Solution Inc.
5
ALSR009-0A 5/7/2002