IC89E54 Datasheet, PDF (23/36 Pages) Integrated Circuit Solution Inc – 8-BITS SINGLE MICROCONTROLLER with 16/32/64-Kbytes of FLASH, 256 byte +512 byte RAM

IC89E54/58/64
Programming a IC89E54/58/64
To program new data into the memory array, supply 5 volts to VDD and RST, and perform the following steps.
1. Set RST to high and PSEN to low.
2. Read the “Read Signature Bytes” command to ensure the correct programming algorithm.
3. Raise EA High (either 12V or 5V).
4. Verify that the memory blocks for programming are in the erased state, FFH. If they are not erased, then erase them
using the Chip Erase command. (Chip Erase operation will have a Ready/Busy signal output from P3.4, if Ready/Busy
signal doesn’t return from low to high in 7.2 sec, the Chip Erase operation will be failed.)
5. Set P2.6, P2.7, P3.6, P3.7 to a properly programming combination.
6. Select the memory location using the address lines (P1[0:7], P2[0:5], P3[2:3]).
7. Present the data in on P0[0:7].
8. Pulse ALE/PROG.
9. Wait for low to high transition on Ready/Busy(P3.4). If Ready/Busy is from low to high, this address is programmed
completely. If Ready/Busy pin don’t return from low to high in 720us while programming one byte, the Programming
operation will be failed.
10. Repeat steps 6~9 until programming is finished.
Lock bits Features
The IC89E54/58/64 provide three lock bits to protect the embedded program against software piracy. These three
bytes are user programmable. The relation between lock bits status and protection type are listed in table 6.
Table 6. Lock Bits Features
Program Lock bits
LB1 LB2 LB3
1U
U
U
2P
U
U
3P
P
U
4P
P
P
Protection in Normal Mode
No program lock feature enabled.
MOVC instructions executed from external program memory are
disabled from fetching code bytes from internal memory, EA is
sampled and latched on reset, and Data verification is disabled.
(“Verify Signature Byte” and “Verify Lock Bits are still enabled.)
Same as 2, also further written operation of the Flash is disabled
Same as 3, also external execution is disabled.
Special Issue
There are two conditions must be sure. One is P2.6 and P2.7 can not be low levels when RST pin falling edge. Another
is P4.3 can not be low level while RST falling edge. One of upper case is generate, the program will not be executing
correctly.
Integrated C ircuitSolution Inc.
23
MC012-0C 11/16/2001