IC89E54 Datasheet, PDF (17/36 Pages) Integrated Circuit Solution Inc – 8-BITS SINGLE MICROCONTROLLER with 16/32/64-Kbytes of FLASH, 256 byte +512 byte RAM

IC89E54/58/64
P2EAH, P2EAL: The Port Enable Address Registers for Port 2 is defined as input buffer like 74244, or an output-latched
logic like a 74373. The P2EAH contains the high-order byte of address, the P2EAL contains the low-order byte of address.
Figure 12 shows architecture of Port 2. The following example shows how to program the Port 2 as a output-latched port
at address 5678H.
MOV P2EAL,#78H
;High-order byte of address to enable Port 2 latch function.
MOV P2EAH,#56H
;Low-order byte of address to enable Port 2 latch function.
MOV P2ECON,#02H
;Configure the port 2 as an output-latched port.
MOV DPTR,#5678H
;Move data 5678H to DPTR.
MOV A,#55H
MOVX @DPTR,A
;The pins P2.7~P2.0 will output and latch the value 55H.
When Port 2 is configured as 74244 or 74373 function, the instruction “MOV P2,#XX” will write the data #XX to P2 register
only but not output to port pins P2.7~P2.0.
Power Down Mode
When the PD bit in the PCON register is set, the processor enters the power-down mode. In this mode, all of the clocks
are stopped, including the oscillator. To exit from power-down mode is by a hardware reset or external interrupts INT0 to
INT3 when enabled and set to level triggered. To ensure that the oscillator is stable before the CPU restarts, the IC89E54/
58/64 series provide adjustable internal software delay counter. By the default, the device will experience a delay of 2048
clock cycles while the oscillation is recognized. The period of delay is selected by configuring the AUXR register bits OD0,
OD1 and OD2.
Reduce EMI Emission
Because of on-chip flash, when a program is running in internal program memory space, the ALE will be unused. The
transition of ALE will cause larger noise and EMI effect, so it can be turned off to reduce noise and EMI emission if it is
useless. Turning off the ALE signal transition only requires setting the bit 0 of the AUXR SFR, which is located at 08EH.
When ALE is turned off, it will be reactivated when the program accesses external ROM/RAM data or jumps to execute an
external ROM code. The ALE signal will turn off again after it has been completely accessed or program returns to internal
ROM code space. The ALED bit in the AUXR register, when set, disables the ALE output.
AUXR(8EH) : Reset value is xxx0x000B.
B7
B6
B5
Flag Name
-
-
-
B4
B3
ENARAM
-
B2
OD1
B1
OD0
B0
ALED
Bit
Name
7-5 -
4
ENARAM
3
-
2-1 OD1-OD0
0
ALED
Description
These bits are reserved.
1, Enable AUX RAM.
These bits are reserved.
Select the delay periods of oscillation when waking up from power-down mode.
OD1 OD0 Delay Period
00
2,048 clock cycles (Default)
01
8,192 clock cycles
10
32,768clock cycles
11
131,072 clock cycles
1, Turn off ALE output while CPU accesses internal Flash memory.
Integrated C ircuitSolution Inc.
17
MC012-0C 11/16/2001