IC80C51 Datasheet, PDF (19/44 Pages) Integrated Circuit Solution Inc – CMOS SINGLE CHIP 8-BIT MICROCONTROLLER

IC80C51
IC80C31
Using the Timer 1 to Generate Baud Rates
When Timer 1 is the baud rate generator, the baud rates in
Modes 1 and 3 are determined by the Timer 1 overflow rate
and the value of SMOD according to the following equation.
Mode 1, 3
Baud Rate
=
2^SMOD
32
X (Timer 1 Overflow Rate)
The Timer 1 interrupt should be disabled in this application.
The Timer itself can be configured for either timer or
counter operation in any of its three running modes. In the
most typical applications, it is configured for timer operation
in auto-reload mode (high nibble of TMOD = 0010B). In this
case, the baud rate is given by the following formula.
Mode 1,3 ₌
Baud Rate
2^SMOD
Oscillator Frequency
X
32
12x [256 – (TH1)]
Programmers can achieve very low baud rates with Timer
1 by leaving the Timer 1 interrupt enabled, configuring the
Timer to run as a 16-bit timer (high nibble of TMOD =
0001B), and using the Timer 1 interrupt to do a 16-bit
software reload.
Table 9 lists commonly used baud rates and how they can
be obtained from Timer 1.
More About Mode 0
Serial data enters and exits through RXD. TXD outputs the
shift clock. Eight data bits are transmitted/received, with
the LSB first. The baud rate is fixed at 1/12 the oscillator
frequency.
Figure 15 shows a simplified functional diagram of the
serial port in Mode 0 and associated timing.
Transmission is initiated by any instruction that uses SBUF
as a destination register. The "write to SBUF" signal at
S6P2 also loads a 1 into the ninth position of the transmit
shift register and tells the TX Control block to begin a
transmission. The internal timing is such that one full
machine cycle will elapse between "write to SBUF" and
activation of SEND.
SEND transfer the output of the shift register to the alternate
output function line of P3.0, and also transfers SHIFT
CLOCK to the alternate output function line of P3.1. SHIFT
CLOCK is low during S3, S4, and S5 of every machine
cycle, and high during S6, S1, and S2. At S6P2 of every
machine cycle in which SEND is active, the contents of the
transmit shift register are shifted one position to the right.
As data bits shift out to the right, 0s come in from the left.
When the MSB of the data byte is at the output position of
the shift register, the 1 that was initially loaded into the ninth
position is just to the left of the MSB, and all positions to the
left of that contain 0s. This condition flags the TX Control
Table 7. Commonly Used Baud Rates Generated by Timer 1
Baud Rate
Mode 0 Max: 1 MHz
Mode 2 Max: 375K
Modes 1, 3: 62.5K
19.2K
9.6K
4.8K
2.4K
1.2K
137.5
110
110
fOSC
12 MHz
12 MHz
12 MHz
11.059 MHz
11.059 MHz
11.059 MHz
11.059 MHz
11.059 MHz
11.986 MHz
6 MHz
12 MHz
Integrated Circuit Solution Inc.
MC001-0B
SMOD
X
1
1
1
0
0
0
0
0
0
0
Timer 1
C/T
Mode
Reload Value
X
X
X
X
X
X
0
2
FFH
0
2
FDH
0
2
FDH
0
2
FAH
0
2
F4H
0
2
E8H
0
2
1DH
0
2
72H
0
1
FEEBH
19