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IC41C16100A Datasheet, PDF (19/21 Pages) Integrated Circuit Solution Inc – 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
IC41C16100A/IC41C16100AS
IC41LV16100A/IC41LV16100AS
CBR REFRESH CYCLE (Addresses; WE, OE = DON'T CARE)
RAS
tRPC
tCP
UCAS/LCAS
I/O
tRP
tRAS
tCHR
tCSR
tRPC
tRP
tRAS
tCSR
tCHR
Open
HIDDEN REFRESH CYCLE(1) (WE = HIGH; OE = LOW)
RAS
tCRP
UCAS/LCAS
tRAS
tRCD
tRP
tRSH
tRAS
tCHR
tASR
ADDRESS
Row
I/O
OE
tRAD
tRAH tASC
Open
tRAL
tCAH
Column
tAA
tRAC
tCLZ
tCAC
tOE
tORD
tOFF(2)
Valid Data
Open
tOD
Undefined
Don’t Care
Notes:
1. A Hidden Refresh may also be performed after a Write Cycle. In this case, WE = LOW and OE = HIGH.
2. tOFF is referenced from rising edge of RAS or CAS, whichever occurs last.
Integrated Circuit Solution Inc.
19
DR030-0A 09/28/2001