IC41C16256 Datasheet, PDF (16/21 Pages) Integrated Circuit Solution Inc – 256Kx16 bit Dynamic RAM with EDO Page Mode

IC41C16256
IC41LV16256
EDO-PAGE-MODE READ-WRITE CYCLE (LATE WRITE and READ-MODIFY WRITE Cycles)
RAS
tCRP
tCSH
tRCD
tCAS, tCLCH
UCAS/LCAS
tASR
tRAH
tAR
tRAD
tASC
tCAH
ADDRESS
Row
Column
tRASP
tPC / tPRWC⁽¹⁾
tCP
tCAS, tCLCH
tASC
tCAH
Column
tRSH
tCP
tCAS, tCLCH
tASC
tRAL
tCAH
Column
tRP
tCP
Row
WE
I/O
OE
tRWD
tRCS
tCWL
tWP
tAWD
tCWD
tCWL
tWP
tAWD
tCWD
tAA
tRAC
tCAC
tCLZ
Open
tOE
tDH
tDS
DOUT
DIN
tOD
tAA
tCPA
tCAC
tCLZ
tOE
tDH
tDS
DOUT DIN
tOD
tRWL
tCWL
tWP
tAWD
tCWD
tAA
tCPA
tCAC
tCLZ
tOE
tDH
tDS
DOUT
DIN
tOD
tOEH
Open
Undefined
Don’t Care
Note:
1. tPC is for LATE write cycles only. tPC can be measured from falling edge of CAS to falling edge of CAS, or from rising edge of
CAS to rising edge of CAS. Both measurements must meet the tPC specifications.
16
Integrated Circuit Solution Inc.
DR018-0C 04/23/2004