X25256 Datasheet, PDF (10/17 Pages) IC MICROSYSTEMS – 5MHz SPI Serial E 2 PROM with Block Lock ™ Protection

X25256 – Preliminary Information
EQUIVALENT A.C. LOAD CIRCUIT
5V
2.06KΟ
SO
3.03KΟ
30pF
A.C. CONDITIONS OF TEST
Input pulse levels
Input rise and fall times
Input and output timing levels
V_CC x 0.1 to V_CC x 0.9
10ns
V_CC X 0.5
A.C. OPERATING CHARACTERISTICS
Data Input Timing
Symbol
f_SCK
t_CYC
t_LEAD
t_LAG
t_WH
t_WL
t_SU
t_H
t _RI⁽⁴⁾
t_FI⁽⁴⁾
t_HD
t_CD
t_CS
t_WC⁽⁵⁾
Clock Frequency
Cycle Time
CS Lead Time
CS Lag Time
Clock HIGH Time
Clock LOW Time
Data Setup Time
Data Hold Time
Data In Rise Time
Data In Fall Time
HOLD Setup Time
HOLD Hold Time
CS Deselect Time
Write Cycle Time
Parameter
V_CC = 2.5V–5.5V
Min.
Max.
0
5.0
200
100
100
80
80
20
20
2
2
40
40
100
10
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
ms
Data Output Timing
Symbol
f_SCK
t_DIS
t_V
t_HO
t_RO⁽⁴⁾
t_FO⁽⁴⁾
t_LZ⁽⁴⁾
t_HZ⁽⁴⁾
Parameter
Clock Frequency
Output Disable Time
Output Valid from Clock LOW
Output Hold Time
Output Rise Time
Output Fall Time
HOLD HIGH to Output in Low Z
HOLD LOW to Output in High Z
V_CC = 2.5V–5.5V
Min.
Max.
0
5.0
100
80
0
50
50
50
50
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
Notes: (4)This parameter is periodically sampled and not 100% tested.
(5)t_WC is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile
write cycle
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Characteristics subject to change without notice. 10 of 17