IC-TW8_13 Datasheet, PDF (9/63 Pages) IC-Haus GmbH – 16-BIT SIN/COS INTERPOLATOR WITH AUTO-CALIBRATION

iC-TW8 16-BIT SIN/COS
WITH AUTO-CALIBRATION
INTERPOLATO_pR_reliminary
Rev A2, Page 9/12
ELECTRICAL CHARACTERISTICS
Operating conditions: AVDD = DVDD = 3.1...5.5 V, Tj = -40...+125 °C, reference point AVSS unless otherwise stated
Item Symbol Parameter
No.
Conditions
Min. Typ.
Digital Input Pins:
EESEL, CALIB, CLOCK, IR, FRAME, SPI_SI, SPI_SCLK, SPI_xSS, PINSEL, SCL, SDA, C0, C1, C2, C3, FAB
701 Vt()hi
Input Logic Threshold High
DVDD = 5 V
DVDD = 3.3 V
702 Vt()lo
Input Logic Threshold Low
DVDD = 5 V
0.8
DVDD = 3.3 V
0.8
703 Vhys()
Input Hysteresis at
0.15
CALIB, SPI_SCLK
704 Ilk()
Input Leakage Current at
SPI_SI, SPI_SCLK, SPI_xSS
705 Rpu()
Pull-Up Resistor at IR
150
706 Rpu()
Pull-Up Resistor at
10
CALIB, SCL, SDA
707 Rpd()
Pull-Down Resistor at EESEL,
150
CLOCK, FRAME, PINSEL
708 Rpd()
Pull-Down Resistor at FAB
5
Digital Output Pins:
CLOCK, FRAME, SPI_SO, OUTA, OUTB, OUTZ, STATUS, FAULT, SDA, WP
801 Vs()hi
Output Voltage High
DVDD = 5 V, IOUT = 4 mA
4.5
DVDD = 3.3 V, IOUT = 4 mA
2.8
802 Vs()lo
Output Voltage Low
DVDD = 5 V, IOUT = -4 mA
DVDD = 3.3 V, IOUT = -4 mA
803 Idc()max Permissible Output DC Load
per pin
804 Idcmax
Permissible Total Output DC
Load
for all output pins in aggregate
805 tr()
Rise Time
DVDD = 5 V, CL = 50 pF
50
DVDD = 3.3 V, CL = 50 pF
30
806 tf()
Fall Time
DVDD = 5 V, CL = 50 pF
50
DVDD = 3.3 V, CL = 50 pF
30
Bias Outputs: VC, VREF
901 VC
Bias Voltage at VC
I(VREF) = 0
50
902 dVREF Bias Voltage at VREF versus VC dVREF = V(VREF) - V(VC); VC I(VREF) = 0
-1
Unit
Max.
2.2
V
2.2
V
V
V
0.75 %DVDD
±50 nA
kΩ
kΩ
kΩ
kΩ
V
V
0.3 mV
0.3 mV
±10 mA
±60 mA
ns
ns
ns
ns
%VDD
V
tAB
B
tMTD
converter
error
actual
converter
INL: The maximum absolute error.
DNL: the maximum step
between two consecutive
samples.
A
twhi
AArel
AArel
T
Figure 1: Description of AB output signals.
ideal converter
0
180
360
angular position
Figure 2: Definition of integral and differential nonlin-
earity.