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IC-ML Datasheet, PDF (4/17 Pages) IC-Haus GmbH – HALL Position Sensor / Encoder
iC-ML
HALL Position Sensor / Encoder
Rev A3, Page 4/17
ELECTRICAL CHARACTERISTICS
Operating conditions: VDD = 5 V ±10 % , Tj = -40 ... 125 °C, unless otherwise noted
Item Symbol Parameter
No.
Conditions
General
001 VDD
Supply voltage
002 I(VDD) Supply current
open pins, normal operation
open pins, power reduction mode (PRM)
003 I(VDD)sb Standby supply current
NEN = VDD
004 td(VDD)on Turn on delay
VDD > 4 V, see Fig. 9
005 td(VDD)off Turn off delay
VDD < 2.6 V
Hall sensor array
101 Hext
Requiered external magnetic field at chip surface
strength
102 psens
Hall sensor array pitch
see Fig. 1
103 ysens
Hall sensor array distance to
center of die
see Fig. 1
104 xdis
Lateral displacement of chip to in TSSOP20 package, see Fig. 2
package
105 ydis
Vertical displacement of chip to in TSSOP20 package, see Fig. 2
package
106 Φdis
Angular displacement of chip with in TSSOP20 package, see Fig. 2
reference to package
107 hsens
Distance chip surface to top of in TSSOP20 package, see Fig. 2
package
Signal conditioning
201 Voff
Offset voltage
on output, with external magnetic field ampli-
tude of 20 kA/m
202 TC(Voff) Temperatur coefficient of offset
voltage
203 Vdc
Output mean value
204 Ratio
Amplitude ratio of SIN / COS
205 fhc
Cut off frequency
206 t()settle Settling time
to 70 % amplitude, Hext = 40 kA/m
207 V()gain Gain output voltage
208 V()ampl Sine/Cosine amplitude
V()ampl = V()max - Vdc
Sine-to-digital converter
301 AArel
Relative angular error
with reference to one periode, see Fig. 3
302 f(OSC) Oscillator frequency
303 TC(OSC) Temperature coefficient of oscilla-
tor frequency
304 hys
Converter hysteresis
Configuration inputs CFG1, CFG2, CFG3
401 Vt()hi
Threshold voltage high
402 Vt()lo
Threshold voltage low
403 V0()
Open circuit voltage
404 Ri()
Input resistance
Enable input NEN
501 Vt()hi
Threshold voltage high
502 Vt()lo
Threshold voltage low
503 Vt()hys Hysteresis
Vt()hys = Vt()hi - Vt()lo
504 Ipu()
Pull-up current
V() = 0...VDD - 1 V
Digital outputs: A, B, C, D
601 Vs()hi
Saturation voltage high
Vs()hi = VDD - V(), I() = -4 mA
602 Vs()lo
Saturation voltage low
I() = 4 mA
603 tr()
Rise time
CL() = 50 pF
Unit
Min. Typ. Max.
4.5
5
5.5
V
14
20
mA
7
10
mA
200 µA
10
µs
10
µs
20
50 100 kA/m
1.28
mm
0.7
mm
-0.2
0.2 mm
-0.2
0.2 mm
-3
3
DEG
400
µm
-50
50
mV
-50
50 µV/K
45
50
55 %VDD
0.95 1.00 1.05
20
kHz
80
150
µs
0.05
4.0
V
0.9 1.0 1.1
V
-20
20
%
200 256 300 kHz
-0.1
%/K
1
LSB
60
78 % VDD
25
40 % VDD
43
57 % VDD
45 150 450 kΩ
2
V
0.8
V
300
mV
-240 -120 -25
µA
0.4
V
0.4
V
60
ns