IC-ML Datasheet, PDF (15/17 Pages) IC-Haus GmbH – HALL Position Sensor / Encoder

iC-ML
HALL Position Sensor / Encoder
Rev A3, Page 15/17
NEN
NERR
A
B
Z
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angle between 0° and 180° the device counts up to
the operating point; if this angle is between 180° and
360°, it first counts down. Starting when the device is
switched on all edges are output until the absolute po-
sition is reached. The setup has to wait until a certain
time has elapsed; this is dependent on the selected
resolution and is the settling time of the sensor until the
error bit is deleted plus the time needed to count up or
down to the absolute position. With a resolution of 8
bits and an angle of 180°, for example, this period con-
stitutes 100 µs sensor settling time plus 128 times 4 µs
until the absolute position has been pinpointed. The
absolute position is thus available after a maximum of
612 µs has elapsed.
Figure 18: Incremental signals after switching on
the device, counting down
Always starting at zero position, the device begins
searching for the absolute position, locating it as
quickly as possible. If this positon corresponds to an
By way of example Figure 18 illustrates how the incre-
mental interface behaves when the device first counts
down to the absolute position and the magnetic tape
then moves forwards, with the sensor following with the
relevant sequence. The Z signal is synchronous with
A and B at low.
Incremental CLK modes
Mode NEN CFG1 CFG2 CFG3
Inkr. CLK
CLK 8 low high low open
CLK 6 low high high open
DIR 8 low high low high
DIR 6 low high high high
Port A
NCLKUP
NCLKUP
NCLK
NCLK
Port B
NCLKDN
NCLKDN
DIR
DIR
Port C
NCLR
NCLR
NCLR
NCLR
Port D Res. Comments
NERR 8
NERR 6
NERR 8
NERR 6
CLK-INC mode
In CLK-INC mode two different count signals are
provided for the countup and countdown sequences.
Depending on the direction of rotation either signal
NCLKUP (pin A) is pulsed when the device counts
up or signal NCLKDN (pin B) when the device counts
down. In each case the remaining signal is high. The
zero angle is displayed by the NCLR index track which
can serve as an asynchronous reset for an external
counter.
mented; with a rising edge of clock signal NCLKDN
and a high at NCLKUP the counter status is decre-
mented. Two 4-bit counters can be cascaded here to
create a full 8-bit counter.
NCLUP
NCLDN
Figure 19 demonstrates how iC-ML behaves in CLK-
INC mode, firstly when it counts up from the zero po-
sition and then, following a change in the direction of
movement, when it counts back down to zero position.
NCLR
This mode permits the operation of external binary
counter modules (such as 74HC/HCT193, for exam-
ple), with signal NCLR (pin C) being used to reset the
counter. With a rising edge of clock signal NCLKUP
and a high at NCLKDN the counter status is incre-
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Figure 19: CLK-INC mode