IC-MQ Datasheet, PDF (33/39 Pages) IC-Haus GmbH – PROGRAMMABLE 9-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

iC-MQ PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
TEST MODE
Rev D4, Page 33/39
iC-MQ switches to test mode when a voltage greater
than VTMon is applied to pin ERR (precondition:
EMODE(0) = 1). In response iC-MQ transmits its setup
settings as current-modulated data using error sig-
nal I/O pin ERR either directly from the RAM (for
EMODE2 = 1) or after re-reading the EEPROM (for
EMODE2 = 0). Should the voltage at the ERR pin fall
below VTMoff test mode is terminated and data trans-
mission aborted.
The clock rate for the data output is determined by
ENFAST. Two clock rates can be selected: 780 ns for
ENFAST = 1 or 3.125 µs for ENFAST = 0 (see Electri-
cal Characteristics, B12, for clock frequency and toler-
ances).
EMODE
Code
00
01
10
11
Notes
Adr 0x15, bit 7:6
Function during test
mode
Function following test
mode
Normal operation
Normal operation
Transmission of error
and OEM data*
Repeated read out of
EEPROM
Normal operation
Repeated read out of
EEPROM
Transmission of
EEPROM contents
(0x0-0x7F)
Repeated read out of
EEPROM
*) Selectable address ranges:
EMODE2 = 0: EEPROM addresses 0x24 to 0x7F
EMODE2 = 1: RAM addresses 0x3B to 0x43
Table 61: Test Mode
Data is output in Manchester code via two clock pulses
per bit. To this end the lowside current source switches
between a Z state (OFF = 0 mA) and an L state (ON =
2 mA).
The bit information lies in the direction of the current
source switch:
Zero bit: change of state Z → L (OFF to ON)
One bit: Change of state L → Z (ON to OFF)
Transmission consists of a start bit (a one bit), 8 data
bits and a pause interval in Z state (the timing is iden-
tical with an EEPROM access via the I²C interface).
Example: byte value = 1000 1010
Transmission including the start bit: 1 1000 1010
In Manchester code: LZ LZZL ZLZL LZZL LZZL
Decoding of the data stream:
ZZZZZZ LZ LZ ZL ZL ZL LZ ZL LZ ZL ZZZZZZ
Pause 1 1 0 0 0 1 0 1 0 Pause
EMODE2 Adr 0x18, bit 7
Code
Register selection
0
Reading/sending
external configuration
data (DEVID is device
address)
1
Sending internal
configuration data
(ENSL = 1)
Address range for
EMODE = 01
EEPROM address
range 0x24-0x7F
RAM address range
0x3B-0x43
Table 62: Register And Address Selection For Test
Mode
VP
VP
C21
100nF
7
VP
U22-S
AD8029
VN
4
C22
100nF
8
VP
U23-S
LM393
GND
4
U23-B
VP LM393
6_-
7
5₊
JP4
ERR
DATA_ON
M22
IRLML6401
R26
100k
R28
51k
M21
2N7002
VP
R23
2K
D21
LL4148
R27
100k
R21
475k
R22
365k
8
U21
5
LM285
4
VDD
C23
100nF
R24
470
C24
100pF
U22-A
2_-
+ ³
AD8029
NDIS
8
VP
U23-A
LM393
6
2_-
3₊
C25
100nF
max. 5V
VDD
C26
100nF
R25
2k
1
DATA_OUT
dra_mq1d_error_s c hem
Figure 11: Example circuit for the decoding and
conversion of the current-modulated sig-
nals to logic levels.