IC-MQ Datasheet, PDF (18/39 Pages) IC-Haus GmbH – PROGRAMMABLE 9-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

iC-MQ PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Rev D4, Page 18/39
nel analog signals are available following signal condi-
tioning (PCH0 and NCH0).
In mode Calibration 2 the conditioned sine and cosine
signals are output (PCH1, NCH1, PCH2 and NCH2).
In addition intermediate potential VDC1 is provided for
compensating circuit CH1, as is intermediate potential
VDC2 for CH2 (for a description of the calibration pro-
cess, see page 21).
In mode Calibration 3 the internal temperature moni-
toring signals are provided. Calibration of the bias cur-
rent source and temperature monitoring is described
on page 16 and calibration of the zero channel on page
24.
TEST 6
The input voltages at pins X3 to X6 can be checked in
mode Test 6. The following settings are required here:
• GF1 = 0x0
• GF2 = 0x0
• Byte 0x05, bit 3:0 = ’0000’
• Byte 0x0F, bit 3 = ’1’
• Byte 0x0F, bit 4 = ’0’
System Test
This mode enables the signal conditioning to be ad-
justed using comparated sine and cosine signals. To
this end at a resolution of 8 the interpolator generates
a switchpoint every 45 degrees. The objective of the
calibration procedure is a pulse duty cycle of exactly
50% respectively for A₄, B₄ und A₈, B₈. The following
settings are required for mode System Test:
• MODE = 0x0B
• SELRES = 0x1B0
• SELHYS = 0xF
• CFGABZ(7:4) = ’0000’
System Test
Pin Signal
PA A₄
NA A₈
PB B₄
NB B₈
PZ Z_In
NZ TP1
Description
Offset CH1
Phase deviation from 90° between
CH1 and CH2
Offset CH2
Amplitude deviation between
CH1 and CH2
Digital zero signal, unmasked
Verification of line count (pulses) between
two zero pulses
Low signal: verification running (state after
power on reset)
High signal: verification finished
An error messaging at ERR is valid after the
second zero signal (enable required).
Table 15: Digital Calibration Signals