IC-MQ Datasheet, PDF (14/39 Pages) IC-Haus GmbH – PROGRAMMABLE 9-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

iC-MQ PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
SERIAL CONFIGURATION INTERFACE
Rev D4, Page 14/39
The serial configuration interface consists of the two
pins SCL and SDA and enables read and write ac-
cess to an EEPROM with an I²C interface. The readout
clock rate can be selected using ENFAST.
ENSL
Code
0
1
Adr 0x17, bit 3
Function
Normal operation
I²C Slave Mode Enable (Device ID 0x55)
ENFAST
Code
0
1
Notes
Adr 0x00, bit 7
Function
Regular clock rate, f(SCL) approx. 80 kHz
High clock rate, f(SCL) approx. 320 kHz
For in-circuit programming bus lines SCL and SDA
require pull-up resistors.
For line capacitances to 170 pF, adequate values
are:
4.7 kΩ with clock frequency 80 kHz
2 kΩ with clock frequency 320 kHz
The pull-up resistors may not be less than 1.5 kΩ.
To separate the signals a ground line between SCL
and SDA is recommended.
iC-MQ requires a supply voltage during EEPROM
programming (5 V to VDD).
Table 5: Clock Frequency Configuration Interface
Once the supply has been switched on the iC-MQ out-
puts are high impedance (tristate*) until a valid config-
uration is read out from the EEPROM using device ID
0x50.
Table 6: Config. Interface Mode
The device ID for the EEPROM can be entered in reg-
ister DEVID(6:0) (address 0x00), from which iC-MQ
will take its configuration after exiting test mode (see
page 33). The DEVID stored therein is then accepted.
Example of CRC Calculation Routine
unsigned char ucDataStream = 0;
i n t iCRCPoly = 0x11D ;
unsigned char ucCRC=0;
int i = 0;
ucCRC = 1 ; / / s t a r t v a l u e ! ! !
for ( iReg = 0; iReg <47; iReg ++)
{
ucDataStream = ucGetValue ( iReg ) ;
for ( i =0; i <=7; i ++) {
i f ( ( ucCRC & 0x80 ) ! = ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1 ) ^ iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream = ucDataStream << 1 ;
}
}
Bit errors in the 0x00 to 0x2F memory section are
pinpointed by the CRC deposited in register CHK-
SUM(7:0) (address 0x2F in the EEPROM; the CRC
polynomial used is "’1 0001 1101"’ with a start value
of "1").
Should the read configuration data not be confirmed
by the CRC, the readin process is repeated. If no valid
configuration data is available after a fourth readin, iC-
MQ terminates EEPROM access and switches to I²C
slave mode. This switch takes place after 150 ms at
the latest (see Electrical Characteristics, D11), for ex-
ample when no EEPROM is connected.
EEPROM Selection
The following minimal requirements must be fulfilled:
• Operation from 3.3 to 5 V, I²C interface
• At least 512 bits, 64x8
(address range used is 0x00 to 0x3F)
• Support of Page Write with Pages of at least 4
bytes. Errors can otherwise not be saved to the
EEPROM (EMASKE = 0x0).
• Device ID 0x50 "1010 000", no occupation of
0x55 (A2...A0 = 0). iC-MQ can otherwise not be
accessed via 0x55 in I²C slave mode.
For devices loading a valid configuration from the EEP-
ROM register bit ENSL decides whether the I²C slave
function is enabled or not.
Recommended device:
M24C01W
Atmel AT24C01B, ST