IC-GF_15 Datasheet, PDF (22/30 Pages) IC-Haus GmbH – TRANSCEIVER

iC-GF
TRANSCEIVER
Rev F1, Page 22/30
load time cannot be changed (cf. Electrical Characteris- contrasting pulse, forcing the selected line to a state
tics No. 301), only the average value (duty cycle).
different than the current one (short-circuit).
DUTYC(1:0)
Addr. 0x03; bit (3:2)
00
Duty cycle of 1:4
01
Duty cycle of 1:8
10
Duty cycle of 1:10
11
Duty cycle of 1:15
R/W 10
Table 21: Overload detection duty cycle
Spread spectrum oscillator
In SPI mode the spread spectrum operation can be
disabled with the register ENRND.
ENRND
0
1
Addr. 0x02; bit (4)
Spread spectrum disabled
Spread spectrum enabled
R/W 1
Table 22: Spread spectrum oscillator
Figure 10: Communication request pulse genera-
tion
Pull-down currents
In SPI mode the pins NCS and SCLK do only have a
pull-down current.
Undervoltage signalling
Undervoltage at VBO, VCC or VCC3 is signalled in
the status register UVD. A valid undervoltage event is
signalled for the duration of the undervoltage situation
resp. for at least 35 ms (Electrical Characteristics No.
405). Only during this time, the undervoltage event
is signalled in the status register UVD. It will also be
signalled at pin NDIAG. Any confirmed undervoltage
situation at VCC or VCC3 will reset the configuration
register which will also be signalled in the status register
INITR; this bit is cleared when read. The SPI interface
is not affected by any of the undervoltage events and is
still operable, provided that the supply level at VCC is
high enough.
Bit ENSCR enables the communication request func-
tion. By default, communication requests are detected
at channel 1 (Q1 connected to CFI). For detection at
channel 2, the bit SCR2 must be set. As shown in
Figure 11, a communication request is acknowledged
when its duration is inside a defined window (cf. Elec-
trical Characteristics No. 303). The relevant threshold
voltages are given in the Electrical Characteristics Nos.
801, 802, 803 and 804. The example in Table 26 shows
channel 1 used for communication request.
ENSCR
0
1
Addr. 0x02; bit (6)
Communication request disabled
Communication request enabled
R/W 0
Table 24: Enable communication request
UVD(1:0)
00
01
10
11
Addr. 0x04; bit (7:6)
No undervoltage detected
Undervoltage at VCC or VCC3
Undervoltage at VBO
Undervoltage at VBO and VCC/VCC3
Table 23: Undervoltage detection
R 00
SCR2
0
1
Addr. 0x02; bit (5)
Communication request in channel 1
Communication request in channel 2
R/W 0
Table 25: Communication request channel select
Communication requests
The communication request function (IO-Link wake-up)
allows interrupt signal generation by means of a well
defined short-circuit on one of the switching channels.
This requires the relevant switching channel (Q1 or Q2)
to be connected to the feedback channel input CFI (see
Figure 10). The communication request would be a
An acknowledged communication request will be
logged in the status bit SCR and signalled at pin NDIAG.
The communication request is not affected by the out-
put disabling (neither by pin nor register OEN), but is
disabled if the configuration in QCFGx is set to "00".