IC-NE Datasheet, PDF (2/9 Pages) IC-Haus GmbH – LIGHT-GRID PULSE RECEIVER

iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 2/9
DESCRIPTION
The iC-NE device is a light-grid receiver IC. Typi-
cal applications cover light curtains, light barriers and
electro-sensitive protective equipment in general.
Integrated on a single silicon chip the iC-NE contains
a bandpass amplifier with a center frequency of typi-
cally 300 kHz, a differential current-signal output plus
control logic to activate the amplifier and the output.
Deactivated, the current consumption is very low and
the current-signal outputs SN and SP are switched to
high impedance (zero current).
The logic consists of a three-stage shift register in
which the first two stages are triggered by the rising
edge of the clock input CLK. The third flipflop is trig-
gered with the falling clock edge, which produces an
artificial delay in order to avoid race conditions when
shifting the input data via the serial output to the next
device in the chain.
tial current output. The differential outputs SP and
SN are powered up to an equal current, as far as the
attached photodiode does not receive any changes
in light.
The rising edge of a received light pulse (which pro-
duces an increase of photocurrent), causes the out-
put current at SP to increase and at SN to decrease
by an equal value. The sum of I(SP) + I(SN) is kept
constant. For light curtain applications in which only
one device is activated at a time, the outputs SN and
SP can be attached to a two-wire bus.
After processing the serial input data at DIN, the ac-
tivated amplifier and output automatically return to
standby mode, when the clock input receives the sec-
ond rising edge. Therefore, a chain circuitry with mul-
tiple beams has to be set up with just a single data
bit within a shift cycle.
The bandpass amplifier is activated when DIN reads
a logical 1. The output stage still remains dis-
abled (zero current) until the output of the first flipflop
changes to 1. This activates the bias for the com-
plete signal path from light detection to the differen-
The IC contains protective diodes to prevent destruc-
tion by ESD. Logic input pins feature Schmitt-trigger
characteristics for high noise immunity. All pins are
short-circuit proof.
PACKAGES SO8, MSOP8 to JEDEC Standard
PIN CONFIGURATION SO8
(top view)
1
DIN
2
VDD
3
CLK
4
SP
8
PD
7
GND
6
DOUT
5
SN
PIN CONFIGURATION MSOP8
(top view)
1
DIN
VDD
CLK
SP
PD
GND
DOUT
SN
PIN FUNCTIONS
No. Name Function
1 DIN Data Input
2 VDD +5 V Supply Voltage
3 CLK Clock Input
4 SP Pos. Differential Current Output
5 SN Neg. Differential Current Output
6 DOUT Data Output
7 GND Ground
8 PD Photocurrent Input,
photodiode cathode