IC-MA Datasheet, PDF (16/18 Pages) IC-Haus GmbH – ANGULAR HALL SENSOR / ENCODER

iC-MA
ANGULAR HALL SENSOR / ENCODER
Rev B3, Page 16/18
NEN
NERR
A
B
Z
Time [us]
Figure 15: Incremental signals after switching on
the device, counting down
Always starting at an angle of 0° the device begins
searching for the absolute angle, locating it as quickly
as possible. If this absolute angle is between 0° and
180° the device counts up to the operating point; if the
angle is between 180° and 360°, it first counts down.
Starting when the device is switched on all edges are
output until the absolute position is reached. The setup
has to wait until a certain time has elapsed; this is de-
pendent on the selected resolution and is the settling
time of the sensor until the error bit is deleted plus the
time needed to count up or down to the absolute posi-
tion. With a resolution of 8 bits and an angle of 180°,
for example, this period constitutes 100 µs sensor set-
tling time plus 128 times 4 µs until the absolute posi-
tion has been pinpointed. The absolute position is thus
available after a maximum of 612 µs has elapsed.
By way of example Figure 15 illustrates how the incre-
mental interface behaves when the device first counts
down to the absolute position and the magnet then ro-
tates forwards, with the sensor following with the rel-
evant sequence. The Z signal is synchronous with A
and B at low.
Incremental CLK modes
Mode NEN CFG1 CFG2 CFG3
Inkr. CLK
CLK 8 low high low open
CLK 6 low high high open
DIR 8 low high low high
DIR 6 low high high high
Port A
NCLKUP
NCLKUP
NCLK
NCLK
Port B
NCLKDN
NCLKDN
DIR
DIR
Port C
NCLR
NCLR
NCLR
NCLR
Port D Res. Comments
NERR 8
NERR 6
NERR 8
NERR 6
CLK-INC mode
In CLK-INC mode two different count signals are
provided for the countup and countdown sequences.
Depending on the direction of rotation either signal
NCLKUP (pin A) is pulsed when the device counts
up or signal NCLKDN (pin B) when the device counts
down. In each case the remaining signal is high. The
zero angle is displayed by the NCLR index track which
can serve as an asynchronous reset for an external
counter.
and a high at NCLKUP the counter status is decre-
mented. Two 4-bit counters can be cascaded here to
create a full 8-bit counter.
NCLUP
Figure 16 demonstrates how iC-MA behaves in CLK- _NCLDN
INC mode, firstly when it counts up from the zero po-
sition and then, following a change in the direction of
rotation, when it counts back down to an angle of 0°.
NCLR
This mode permits the operation of external binary
counter modules (such as 74HC/HCT193, for exam-
ple), with signal NCLR (pin C) being used to reset the
counter. With a rising edge of clock signal NCLKUP
and a high at NCLKDN the counter status is incre-
mented; with a rising edge of clock signal NCLKDN
Time [us]
Figure 16: CLK-INC mode