IC-MQF Datasheet, PDF (15/37 Pages) IC-Haus GmbH – PROGRAMMABLE 12-BIT Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

iC-MQF PROGRAMMABLE 12-BIT ^preliminary
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
SERIAL CONFIGURATION INTERFACE
Rev A1, Page 15/37
The serial configuration interface consists of the two
pins SCL and SDA and enables read and write ac-
cess to an EEPROM with an I²C interface. The readout
clock rate can be selected using ENFAST.
ENSL
Code
0
1
Adr 0x02, bit 6
Function
Normal operation
I²C Slave Mode Enable (Device ID 0x55)
ENFAST
Code
0
1
Notes
Adr 0x00, bit 4
Function
Regular clock rate, f(SCL) approx. 80 kHz
High clock rate, f(SCL) approx. 320 kHz
For in-circuit programming bus lines SCL and SDA
require pull-up resistors.
For line capacitances to 170 pF, adequate values
are:
4.7 kΩ with clock frequency 80 kHz
2 kΩ with clock frequency 320 kHz
The pull-up resistors may not be less than 1.5 kΩ.
To separate the signals a ground line between SCL
and SDA is recommended.
iC-MQF requires a supply voltage during EEPROM
programming (5 V to VDD).
Table 5: I²C Fast Mode
Once the supply has been switched on, the iC-MQF
outputs are high impedance (tristate) until a valid con-
figuration is read out from the EEPROM using device
ID 0x50.
Table 6: I²C Slave Mode
Example of CRC Calculation Routine
unsigned char ucDataStream = 0;
i n t iCRCPoly = 0x11D ;
unsigned char ucCRC=0;
int i = 0;
ucCRC = 1 ; / / s t a r t v a l u e ! ! !
for ( iReg = 0; iReg <47; iReg ++)
{
ucDataStream = ucGetValue ( iReg ) ;
for ( i =0; i <=7; i ++) {
i f ( ( ucCRC & 0x80 ) ! = ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1 ) ^ iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream = ucDataStream << 1 ;
}
}
EEPROM Selection
The following minimal requirements must be fulfilled:
Bit errors in the 0x00 to 0x2F memory section are
pinpointed by the CRC deposited in register CHK-
SUM(7:0) (address 0x2F in the EEPROM; the CRC
polynomial used is "’1 0001 1101"’ with a start value
of "1").
If the configuration data is not confirmed by the CRC,
the readin process is repeated. If no valid configura-
tion data is available after a fourth readin, iC-MQF ter-
minates EEPROM access and switches to I²C slave
mode. This switch takes place after 150 ms at the lat-
est (see Electrical Characteristics, D11), for example if
no EEPROM is connected.
• Operation from 3.3 to 5 V, I²C interface
• At least 512 bits, 64x8
(address range used is 0x00 to 0x3F)
• Support of Page Write with Pages of at least 4
bytes. Otherwise, errors can not be saved to the
EEPROM (EMASKE = 0x0).
• Device ID 0x50 "1010 000", no occupation of
0x55 (A2...A0 = 0). Otherwise, iC-MQF can not
be accessed via 0x55 in I²C slave mode.
Bit ENSL decides (for devices loading a valid config-
uration from the EEPROM register) whether the I²C
slave function is enabled or not.
Recommended devices: Atmel AT24C01C, ST
M24C01W, ST M24C02 (2K), ROHM BR24L01A-W,
BR24L02-W