ICS840004I-01 Datasheet, PDF (5/16 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER

ICS840004I-01
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 5B. AC CHARACTERISTICS, V_DD = V_DDA = 3.3V±5%, V_DDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
f_OUT
tsk(o)
Output Frequency
Output Skew; NOTE 1, 2
F_SEL[1:0] = 00
F_SEL[1:0] = 01 or 11
F_SEL[1:0] = 10
140
156.25
175
MHz
112
125
140
MHz
56
62.5
70
MHz
60
ps
156.25MHz, (1.875MHz - 20MHz)
0.48
ps
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
125MHz, (1.875MHz - 20MHz)
0.59
ps
62.5MHz, (1.875MHz - 20MHz)
0.53
ps
t_R / t_F
Output Rise/Fall Time
20% to 80%
200
700
ps
odc
Output Duty Cycle
F_SEL[1:0] = 00 or 01
43
F_SEL[1:0] = 10 or 11
49
57
%
51
%
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V_DDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
TABLE 5C. AC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
f_OUT
tsk(o)
Output Frequency
Output Skew; NOTE 1, 2
F_SEL[1:0] = 00
F_SEL[1:0] = 01 or 11
F_SEL[1:0] = 10
140
156.25
175
MHz
112
125
140
MHz
56
62.5
70
MHz
60
ps
156.25MHz, (1.875MHz - 20MHz)
0.50
ps
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
125MHz, (1.875MHz - 20MHz)
0.60
ps
62.5MHz, (1.875MHz - 20MHz)
0.51
ps
t_R / t_F
Output Rise/Fall Time
20% to 80%
200
700
ps
odc
Output Duty Cycle
F_SEL[1:0] = 00 or 01
44
F_SEL[1:0] = 10 or 11
49
56
%
51
%
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V /2.
DDO
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
840004AGI-01
5
REV. A OCTOBER 22, 2007