ICS840004I-01 Datasheet, PDF (4/16 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER

ICS840004I-01
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5% OR 2.5V±5%, OR
V_DD = V_DDA = 3.3V±5%, V_DDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
V_IH
Input High Voltage
V_DD = 3.3V
2
V_DD = 2.5V
1.7
V_IL
Input Low Voltage
V_DD = 3.3V
-0.3
V_DD = 2.5V
-0.3
OE, F_SEL0:1
I_IH
Input
High Current _{nPLL_SEL, MR,}
V_DD = V_IN = 3.465V or
2.625V
V_DD = V_IN = 3.465V or
nXTAL_SEL, REF_CLK
2.625V
V_DD + 0.3
V
V_DD + 0.3
V
0.8
V
0.7
V
5
µA
150
µA
OE, F_SEL0:1
V_DD = 3.465V or 2.5V,
-150
µA
I_IL
Input
Low Current _{nPLL_SEL, MR,}
V_IN = 0V
V_DD = 3.465V or 2.5V,
nXTAL_SEL, REF_CLK
V = 0V
-5
µA
IN
V_OH
Output High Voltage; NOTE 1
V_DDO = 3.3V ± 5%
2.6
V_DDO = 2.5V ± 5%
1.8
V
V
V
Output Low Voltage; NOTE 1
OL
V = 3.3V or 2.5V ± 5%
DDO
0.5
V
NOTE 1: Outputs terminated with 50Ω to V_DDO/2. See Parameter Measurement Information, Output Load Test Circuit.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: Characterized using an 18pF parallel resonant crystal.
Minimum Typical Maximum Units
Fundamental
25
MHz
50
Ω
7
pF
1
mW
TABLE 5A. AC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
F_SEL[1:0] = 00
140
156.25
f_OUT
Output Frequency
F_SEL[1:0] = 01 or 11
F_SEL[1:0] = 10
112
125
56
62.5
tsk(o) Output Skew; NOTE 1, 2
156.25MHz, (1.875MHz - 20MHz)
0.52
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
125MHz, (1.875MHz - 20MHz)
0.65
62.5MHz, (1.875MHz - 20MHz)
0.55
t /t
RF
Output Rise/Fall Time
20% to 80%
200
odc
Output Duty Cycle
F_SEL[1:0] = 00 or 01
43
F_SEL[1:0] = 10 or 11
49
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V_DDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Maximum
175
140
70
60
700
57
51
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
%
840004AGI-01
4
REV. A OCTOBER 22, 2007