ICS840004I-01 Datasheet, PDF (12/16 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER

ICS840004I-01
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
Figure 4 shows a schematic example of the ICS840004I-
01. An example of LVCMOS termination is shown in this
schematic. Additional LVCMOS termination approaches are
shown in the LVCMOS Termination Application Note. In this
example, an 18pF parallel resonant 25MHz crystal is used.
The C1=22pF and C2=22pF are recommended for fre-
quency accuracy. For different board layout, the C1 and C2
may be slightly adjusted for optimizing frequency accuracy.
1kΩ pullup or pulldown resistors can be used for the logic
control input pins.
Logic Control Input Examples
Set Logic
VDD _{Input to}
'1'
RU1
1K
Set Logic
VDD _{Input to}
'0'
RU2
Not Install
VDD=3.3V
VDDO=3.3V
To Logic
Input
pins
RD1
Not Install
To Logic
Input
pins
RD2
1K
VD D
VDDA
R2
C3
10 10uF
VDD
C4
0.01u
VD D
C6
0.1u
U1
1
2
3
4
F_SEL0
nc
nXTAL_SEL
5 ^REF_CLK
6
7
8
9
10
OE
MR
nPLL_SEL
VD D A
nc
VD D
840004i_01
F_SEL1
GND
Q0
20
19
18
17
Q1 ₁₆
VDDO
Q2
Q3
GND
XTAL_IN
15
14
13
12
11
XTAL_OU T
XTAL_OU T
C2
22pF
X1
XTAL_IN
If not using the crystal input, it can be left floating.
C1
22pF
For additional protection the XTAL_IN pin can be
tied to ground.
R3
36
Zo = 50 Ohm
VDDO
LVCMOS
C5
0.1u
VD D
R5
100
Zo = 50 Ohm
R4
100
LVCMOS
Optional Termination
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
FIGURE 4. ICS840004I-01 SCHEMATIC EXAMPLE
840004AGI-01
12
REV. A OCTOBER 22, 2007