HY5W2B6DLF-HE Datasheet, PDF (7/26 Pages) Hynix Semiconductor – 4Banks x 2M x 16bits Synchronous DRAM

HY5W2B6DLF(P) Series
4Banks x 2M x 16bits Synchronous DRAM
BASIC FUNCTIONAL DESCRIPTION (Continued)
Extended Mode Register
BA1 BA0 A11 A10 A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
0
0
0
0
0
0
DS
0
0
PASR
DS (Driver Strength)
A6 A5
Driver Strength
0
0 Full
0
1 1/2 Strength
1
0 1/4 Strength
1
1 Reserved
PASR (Partial Array Self Refresh)
A2 A1 A0 Self Refresh Coverage
0 0 0 All Banks
0 0 1 Half of Total Bank (BA1=0)
0 1 0 Quarter of Total Bank (BA1=BA0=0)
0 1 1 Reserved
1 0 0 Reserved
1 0 1 _{One Eighth of Total Bank (Row Address MSB=0)}
1 1 0 _{One Sixteenth of Total Bank (Row Address 2 MSBs=0)}
1 1 1 Reserved
Rev. 0.2 / May. 2004
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