HYMD264G726B4-M Datasheet, PDF (6/16 Pages) Hynix Semiconductor – Registered DDR SDRAM DIMM

HYMD264G726B(L)4-M/K/H/L
CAPACITANCE (TA=25^oC, f=100MHz )
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Data Input / Output Capacitance
Data Input / Output Capacitance
A0 ~ A12, BA0, BA1
/RAS, /CAS, /WE
CKE0
CS0
CK0, /CK0
DQ0 ~ DQ63, DQS0 ~ DQS17
CB0 ~ CB7
Symbol Min
Max
Unit
CIN1
TBD
TBD
pF
CIN2
TBD
TBD
pF
CIN3
TBD
TBD
pF
CIN4
TBD
TBD
pF
CIN5
TBD
TBD
pF
CIO1
TBD
TBD
pF
CIO2
TBD
TBD
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Output
VTT
RT=50Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.1/Oct. 02
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