HY5DU281622ET Datasheet, PDF (6/34 Pages) Hynix Semiconductor – 128M(8Mx16) GDDR SDRAM

HY5DU281622ET
FUNCTIONAL BLOCK DIAGRAM
4Banks x 2Mbit x 16 I/O Double Data Rate Synchronous DRAM
CLK
/CLK
CKE
/CS
Command
/RAS
Decoder
/CAS
/WE
LDM
UDM
Bank
Control
Mode
Register
Row
Decoder
Write Data Register
16
2-bit Prefetch Unit
32
2Mx16/Bank0
2Mx16/Bank1
32
16
2Mx16/Bank2
2Mx16/Bank3
DS
DQ[0:15]
A0~A11
BA0, BA1
Address
Buffer
Column Decoder
Column Address
Counter
CLK_DLL
LDQS
UDQS
CLK
DLL
/CLK
Block
LDQS, UDQS
Data Strobe
Transmitter
Data Strobe
Receiver
Mode
Register
Rev. 0.5 / Jan. 2005
6