HY5DU281622ET Datasheet, PDF (33/34 Pages) Hynix Semiconductor – 128M(8Mx16) GDDR SDRAM

HY5DU281622ET
CAPACITANCE (TA=25^oC, f=1MHz )
Parameter
Input Clock Capacitance
Input Capacitance
Input / Output Capacitance
Pin
CK, /CK
All other input-only pins
DQ, DQS, DM
Symbol
Min
Max
Unit
CCK
2
3
pF
CIN
2
3
pF
CIO
4
5
pF
Note :
1. VDD = min. to max., VDDQ = 2.375V to 2.625V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
VTT
RT=50Ω
Output
Zo=50Ω
CL=30pF
VREF
Rev. 0.5 / Jan. 2005
33