HY5PS2G431AMP Datasheet, PDF (33/35 Pages) Hynix Semiconductor – 2Gb DDR2 SDRAM(DDP)

1HY5PS2G431AMP
1HY5PS2G831AMP
18. tHZ and tLZ transitions occur in the same access time as valid data transitions. Thesed parameters are referenced
to a specific voltage level which specifies when the device output is no longer driving(tHZ), or begins driving (tLZ).
Below figure shows a method to calculate the point when device is no longer driving (tHZ), or begins driving (tLZ) by
measuring the signal at two different voltages. The actual voltage measurement points are not critical as long as the
calculation is consistenet.
19. tRPST end point and tRPRE begin point are not referenced to a specific voltage level but specify when the device
output is no longer driving (tRPST), or begins driving (tRPRE). Below figure shows a method to calculate these points
when the device is no longer driving (tRPST), or begins driving (tRPRE). Below Figure shows a method to calculate
these points when the device is no longer driving (tRPST), or begins driving (tRPRE) by measuring the signal at two
different voltages. The actual voltage measurement points are not critical as long as the calculation is consistent.
tHZ
tRPST end point
VOH + xmV
VOH + 2xmV
VOL + 1xmV
VOL + 2xmV
tHZ , tRPST end point = 2*T1-T2
VTT + 2xmV
VTT + xmV
VTT -xmV
VTT - 2xmV
tHZ
tRPRE begin point
tLZ , tRPRE begin point = 2*T1-T2
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input signal
crossing at the V_IH(ac) level to the differential data strobe crosspoint for a rising signal, and from the input signal
crossing at the V_IL(ac) level to the differential data strobe crosspoint for a falling signal applied to the device under
test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal
crossing at the V_IH(dc) level to the differential data strobe crosspoint for a rising signal and V_IL(dc) to the differential
data strobe crosspoint for a falling signal applied to the device under test.
Differential Input waveform timing
DQS
DQS
tDS tDH
tDS tDH
VDDQ
VIH(ac)min
VIH(dc)min
VREF(dc)
VIL(dc)max
VIL(ac)max
VSS
22. Input waveform timing is referenced from the input signal crossing at the V_IH(ac) level for a rising signal and
V_IL(ac) for a falling signal applied to the device under test.
Rev. 0.6 / Oct. 2007
33