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| HY5PS2G431AMP Datasheet, PDF (29/35 Pages) Hynix Semiconductor – 2Gb DDR2 SDRAM(DDP) | |||
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Fig. -c Illustration of nominal line for tIH, tDH
1HY5PS2G431AMP
1HY5PS2G831AMP
CK, DQS
CK, DQS
VDDQ
VIH(ac)min
tIS,
tIH,
tDS
tDH
VIH(dc)min
dc to VREF
region
VREF(dc)
VIL(dc)max
nominal
slew rate
tIS,
tIH,
tDS
tDH
nominal
slew rate
VIL(ac)max
Vss
Delta TR
Delta TF
Hold Slew Rate
Rising Signal
=
VREF(dc)-VIL(dc)max
Delta TR
Hold Slew Rate
Falling Signal
=
VIH(dc)min - VREF(dc)
Delta TF
Rev. 0.6 / Oct. 2007
29
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