English
Language : 

H5MS5122DFR Datasheet, PDF (30/62 Pages) Hynix Semiconductor – Mobile DDR SDRAM 512Mbit (16M x 32bit)
11
Mobile DDR SDRAM 512Mbit (16M x 32bit)
H5MS5122DFR Series / H5MS5132DFR Series
READ / WRITE COMMAND
The READ command is used to initiate a Burst Read to an active row. The value of BA0 and BA1 selects the bank and
address inputs select the starting column location.
The value of A10 determines whether or not auto precharge is used. If auto precharge is selected, the row being
accessed will be precharged at the end of the read burst; if auto precharge is not selected, the row will remain open
for subsequent access. The valid data-out elements will be available CAS latency after the READ command is issued.
The Mobile DDR drives the DQS during read operations. The initial low state of the DQS is known as the read preamble
and the last data-out element is coincident with the read postamble. DQS is edge-aligned with read data. Upon com-
pletion of a burst, assuming no new READ commands have been initiated, the I/O's will go high-Z.
The WRITE command is used to initiate a Burst Write access to an active row. The value of BA0, BA1 selects the bank
and address inputs select the starting column location.
The value of A10 determines whether or not auto precharge is used.If auto precharge is selected, the row being
accessed will be precharged at the end of the write burst; if auto precharge is not selected, the row will remain open
for subsequent access. Input data appearing on the data bus, is written to the memory array subject to the DM input
logic level appearing coincident with the data. If a given DM signal is registered low, the corresponding data will be
written to the memory; if the DM signal is registered high, the corresponding data-inputs will be ignored, and a write
will not be executed to that byte/column location. The memory controller drives the DQS during write operations. The
initial low state of the DQS is known as the write preamble and the low state following the last data-in element is write
postamble. Upon completion of a burst, assuming no new commands have been initiated, the I/O's will stay high-Z
and any additional input data will be ignored.
When READ or WRITE command issues, the A0~A7 (column address) are provided if only 1KBytes page size. If the
page size is 2KBytes, the A0~A8 (column address) are provided as shown below figure..
CLK
CLK
CLK
CLK
CKE
(High)
CKE
(H ig h )
CS
CS
RAS
RAS
CAS
CAS
WE
A0~A8
A10
BA0, BA1
WE
CA
A0~A8
CA
High to enable
Auto Precharge A10
Low to disable
Auto Precharge
BA
BA0, BA1
BA
Read Command
Don't Care
READ / WRITE COMMAND
W rite Command
Rev 1.2 / Jul. 2008
30