 English |
|
|
|
|
|
|
|
| HY5DU561622FLTP-5I Datasheet, PDF (27/28 Pages) Hynix Semiconductor – 256M(16Mx16) DDR SDRAM | |||
| |||
| ◁ |
1HY5DU561622FTP-5I
HY5DU561622FTP-4I
CAPACITANCE (TA=25oC, f=1MHz )
Parameter
Input Clock Capacitance
Input Capacitance
Input / Output Capacitanc
Pin
CK, CK
All other input-only pins
DQ, DQS, DM
Symbol
Min
Max
Unit
CCK
2.0
3.0
pF
CIN
2.0
3.0
pF
CIO
4.0
5.0
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Output
VTT
RT=50â¦
Zo=50â¦
CL=30pF
VREF
Rev. 1.1 / Mar. 2008
27
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese