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HY5DU561622FLTP-5I Datasheet, PDF (22/28 Pages) Hynix Semiconductor – 256M(16Mx16) DDR SDRAM
1HY5DU561622FTP-5I
HY5DU561622FTP-4I
DC CHARACTERISTICS II (TA=-40 ~ 85oC, Voltage referenced to VSS = 0V)
Parameter
Symbol
Test Condition
Operating Current
Precharge Power Down
Standby Current
Idle Standby Current
Active Power Down
Standby Current
Active Standby Current
Operating Current
Auto Refresh Current
Self Refresh Current
IDD1
IDD2P
IDD2N
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
IDD6
One bank; Active - Read - Precharge;
Burst Length=4; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once per clock
cycle; IOUT=0mA
All banks idle; Power down mode; CKE=Low,
tCK=tCK(min)
/CS=High, All banks idle; tCK=tCK(min);
CKE=High; address and control inputs changing
once per clock cycle.
VIN=VREF for DQ, DQS and DM
One bank active; Power down mode ; CKE=Low,
tCK=tCK(min)
/CS=HIGH; CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min);
DQ, DM and DQS inputs changing twice per clock
cycle; Address and other control inputs changing
once per clock cycle
Burst=2;Reads; Continuous burst; One bank active;
Address and control inputs changing once per clock
cycle; tCK=tCK(min); IOUT=0mA
Burst=2; Writes; Continuous burst; One bank active;
Address and control inputs changing once per clock
cycle; tCK=tCK(min); DQ, DM and DQS inputs
changing twice per clock cycle
tRC=tRFC(min); All banks active
CKE=<0.2V; External clock on; tCK=tCK(min)
Speed
4
5
160
150
20
20
80
70
55
50
90
80
220
200
220
200
200
180
5
5
Unit Note
mA
mA
mA
mA
mA
mA
mA
mA
mA
Rev. 1.1 / Mar. 2008
22