HY5PS1G431ALFP Datasheet, PDF (24/36 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM

Parameter
Internal write to read command delay
Internal read to precharge command delay
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any non-read
command
Exit active power down to read command
Exit active power down to read command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
HY5PS1G431A(L)FP
HY5PS1G831A(L)FP
HY5PS1G1631A(L)FP
-Continue-
Symbol
tWTR
tRTP
tXSNR
tXSRD
DDR2-667
min
max
7.5
-
7.5
tRFC + 10
200
-
DDR2-800
min
max
7.5
-
7.5
tRFC + 10
200
-
Unit Note
ns
ns
3
ns
tCK
tXP
2
-
2
-
tCK
tXARD
2
2
tCK
1
tXARDS
7 - AL
8 - AL
tCK
1, 2
t_CKE
3
3
tCK
t_AOND
2
2
2
2
tCK
t_AON
tAC(min)
tAC(max)
+0.7
tAC(min)
tAC(max)
+0.7
ns
6,16
t_AONPD
tAC(min)+2
2tCK+
tAC(max)+1
tAC(min)
+2
2tCK+
tAC(max)+1
ns
t_AOFD
2.5
2.5
2.5
2.5
tCK
t_AOF
tAC(min) tAC(max)+ 0.6 tAC(min)
tAC(max)
+0.6
ns
17
t_AOFPD
tAC(min)
+2
2.5tCK+
tAC(max)+1
tAC(min)
+2
2.5tCK+
tAC(max)+1
ns
tANPD
3
3
tCK
tAXPD
8
8
tCK
tOIT
0
12
0
12
ns
tDelay
tIS+tCK+tIH
tIS+tCK
+tIH
ns
15
Rev. 0.7 / Oct. 2007
24