HY5PS12421AFP Datasheet, PDF (23/37 Pages) Hynix Semiconductor – 512Mb DDR2 SDRAM

Parameter
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
512Mb A-ver. DDR2 SDRAM
Symbol
t_CKE
t_AOND
t_AON
t_AONPD
t_AOFD
t_AOF
t_AOFPD
tANPD
tAXPD
tOIT
tDelay
DDR2-800
min
max
3
2
tAC(min)
tAC(min)
+2
2.5
tAC(min)
tAC(min)
+2
3
8
0
tIS+tCK
+tIH
2
tAC(max)
+0.7
2tCK+
tAC(max)+1
2.5
tAC(max)
+0.6
2.5tCK+
tAC(max)+1
12
-Continue-
DDR2-667
min
max
3
Unit Note
tCK
2
2
tCK
tAC(min)
tAC(max)
+0.7
ns
6,16
tAC(min)+2
2tCK+
tAC(max)+1
ns
2.5
2.5
tCK
tAC(min) tAC(max)+ 0.6 ns
17
tAC(min)
+2
3
8
0
2.5tCK+
tAC(max)+1
ns
tCK
tCK
12
ns
tIS+tCK+tIH
ns
15
Rev. 0.2 / Mar. 2005
23