HY5DU283222Q Datasheet, PDF (22/27 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

DC CHARACTERISTICS II (TA=0 to 70^oC, Voltage referenced to VSS = 0V)
HY5DU283222Q
Parameter
Symbol
Test Condition
Operating Current
Precharge Standby Current
in Power Down Mode
Precharge Standby Current
in Non Power Down Mode
Active Standby Current
in Power Down Mode
Active Standby Current
in Non Power Down Mode
Burst Mode Operating
Current
Auto Refresh Current
Self Refresh Current
IDD1
Burst length=4, One bank active
tRC ≥ tRC(min), IOL=0mA
IDD2P CKE ≤ VIL(max), tCK = min
IDD2N
CKE ≥ VIH(min), /CS ≥ VIH(min),
tCK = min, Input signals are changed
one time during 2clks
IDD3P CKE ≤ VIL(max), tCK = min
IDD3N
CKE ≥ VIH(min), /CS ≥ VIH(min),
tCK = min, Input signals are changed
one time during 2clks
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
IDD5
tRC ≥ tRFC(min),
All banks active
IDD6 CKE ≤ 0.2V
Speed
Unit Note
4
45
5
55
260 250 240 230 mA 1
30
25
20
20 mA
90
85
80
80 mA
35
30
25
25 mA
130 110 100 100 mA
450 400 370 350 mA 1
270
mA 1,2
3
mA
Note :
1. IDD1, IDD4 and IDD5 depend on output loading and cycle rates. Specified values are measured with the output open.
2. Min. of tRFC (Auto Refresh Row Cycle Time) is shown at AC CHARACTERISTICS.
Rev. 1.2/Oct. 02
22