HY62U8200B Datasheet, PDF (2/12 Pages) Hynix Semiconductor – 256K x8 bit 3.0V Low Power CMOS slow SRAM

Y62U8200B Series
DESCRIPTION
The HY62U8200B is a high speed, low power and
2M bit CMOS SRAM organized as 262,144 words
by 8bit. The HY62U8200B uses high performance
CMOS process technology and designed for high
speed low power circuit technology. It is
particularly well suited for used in high density low
power system application. This device has a data
retention mode that guarantees data to remain
valid at a minimum power supply voltage of 2.0V.
FEATURES
• Fully static operation and Tri-state output
• TTL compatible inputs and outputs
• Battery backup( LL-part )
-. 2.0V(min) data retention
• Standard pin configuration
-. 32-sTSOPI-8X13.4, 32-TSOPI -8X20
(Standard and Reversed)
Product
No.
Voltage
(V)
Speed
(ns)
Operation
Current/Icc(mA)
HY62U8200B 2.7~3.3 70*/85/100
5
HY62U8200B-E 2.7~3.3 70*/85/100
5
HY62U8200B-I 2.7~3.3 70*/85/100
5
Note 1. Blank : Commercial, E : Extended, I : Industrial
2. Current value is max.
3. * measured with 30pF test load
Standby
Current(uA)
25
25
25
Temperature
(°C)
0~70
-25~85(E)
-40~85(I)
PIN CONNECTION
A11 1
A9 2
A8 3
A13 4
/WE 5
CS2 6
A15 7
Vcc 8
A17
A16
9
10
A14 11
A12 12
A7 13
A6 14
A5 15
A4 16
TSOP-I
(Standard)
32 /OE A11 1
31 A10 A9 2
30 /CS1 A8 3
29 DQ8 A13 4
28 DQ7 /WE 5
27 DQ6 CS2 6
26 DQ5 A15 7
25 DQ4 Vcc 8
24
23
Vss A17
DQ3 A16
9
10
22 DQ2 A14 11
21 DQ1 A12 12
20 A0 A7 13
19 A1 A6 14
18 A2 A5 15
17 A3 A4 16
32 /OE
31 A10
30 /CS1
29 DQ8
28 DQ7
27 DQ6
26 DQ5
25 DQ4
24
23
Vss
DQ3
22 DQ2
21 DQ1
20 A0
19 A1
18 A2
17 A3
sTSOP-I
(Standard)
PIN DESCRIPTION
BLOCK DIAGRAM
Pin Name
Pin Function
A0
/CS1
Chip Select 1
CS2
Chip Select 2
/WE
Write Enable
/OE
Output Enable
A0 ~ A17
Address Input
I/O1 ~ I/O8
Data Input/Output
Vcc
Power(2.7V~3.3V)
A17
Vss
Ground
/CS1
CS2
/WE
/OE
ROW
DECODER
MEMORY ARRAY
256K x 8
I/O1
I/O8
Rev 06 / Apr. 2001
2