HY51VS18163HG Datasheet, PDF(2/12 Page) Hynix Semiconductor

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HY51VS18163HG Datasheet, PDF (2/12 Pages) Hynix Semiconductor – 1M x 16Bit EDO DRAM

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PIN CONFIGURATION

VCC 1

I/O0 2

I/O1 3

I/O2 4

I/O3 5

VCC 6

I/O4 7

I/O5 8

I/O6 9

I/O7 10

NC 11

NC 12

WE 13

RAS 14

A11 15

A10 16

A0 17

A1 18

A2 19

A3 20

VCC 21

42 VSS

41 I/O15

40 I/O14

39 I/O13

38 I/O12

37 VSS

36 I/O11

35 I/O10

34 I/O9

33 I/O8

32 NC

31 LCAS

30 UCAS

29 OE

28 A9

27 A8

26 A7

25 A6

24 A5

23 A4

22 VSS

42 Pin Plastic SOJ

HY51V(S)18163HG/HGL

VCC 1

I/O0 2

I/O1 3

I/O2 4

I/O3 5

VCC 6

I/O4 7

I/O5 8

I/O6 9

I/O7 10

NC 11

NC 15

NC 16

WE 17

RAS 18

A11 19

A10 20

A0 21

A1 22

A2 23

A3 24

VCC 25

50 VSS

49 I/O15

48 I/O14

47 I/O13

46 I/O12

45 VSS

44 I/O11

43 I/O10

42 I/O9

41 I/O8

40 NC

36 NC

35 LCAS

34 UCAS

33 OE

32 A9

31 A8

30 A7

29 A6

28 A5

27 A4

26 VSS

44(50) Pin Plastic TSOP-II

PIN DESCRIPTION

/RAS

/UCAS, /LCAS

/WE

/OE

A0-A9

I/O 0- I/O 15

Vcc

Vss

Function

Row Address Strobe

Column Address Strobe

Write Enable

Output Enable

Address Inputs

Refresh Address Inputs

Data Input / Output

Power (3.3V)

Ground

No connection

Rev.0.1/Apr.01

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