HMP351U6AFR8C-Y5 Datasheet, PDF (2/20 Pages) Hynix Semiconductor – 240pin DDR2 SDRAM Unbuffered DIMMs based on 2Gb A version

1240pin DDR2 SDRAM Unbuffered DIMMs
SPEED GRADE & KEY PARAMETERS
Speed @CL3
Speed @CL4
Speed @CL5
Speed @CL6
CL-tRCD-tRP
Y5
(DDR2-667)
400
533
667
-
5-5-5
S6
(DDR2-800)
400
533
800
800
6-6-6
S5
(DDR2-800)
400
533
800
800
5-5-5
Unit
Mbps
Mbps
Mbps
Mbps
tCK
ADDRESS TABLE
Density Organization Ranks
SDRAMs
# of
DRAMs
# of row/bank/column Address
Refresh
Method
4GB 512M x 64
2
256Mb x 8
16
14(A0~A13)/3(BA0~BA2)/10(A0~A9) 8K / 64ms
4GB 512M x 72
2
256Mb x 8
18
14(A0~A13)/3(BA0~BA2)/10(A0~A9) 8K / 64ms
Rev. 0.1 / Mar 2009
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