HMP351U6AFR8C-Y5 Datasheet, PDF (1/20 Pages) Hynix Semiconductor – 240pin DDR2 SDRAM Unbuffered DIMMs based on 2Gb A version

240pin DDR2 SDRAM Unbuffered DIMMs based on 2Gb A version
This Hynix unbuffered Dual In-Line Memory Module (DIMM) series consists of 2Gb A version DDR2
SDRAMs in Fine Ball Grid Array (FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 2Gb
version A based DDR2 Unbuffered DIMM series provide a high performance 8 byte interface in 133.35mm
width form factor of industry standard. It is suitable for easy interchange and addition.
FEATURES
• JEDEC standard Double Data Rate2
Synchronous DRAMs (DDR2 SDRAMs) with
1.8V +/- 0.1V Power Supply
• All inputs and outputs are compatible with
SSTL_1.8 interface
• 8 Bank architecture
• Posted CAS
• Programmable CAS Latency 3,4,5, 6
• OCD (Off-Chip Driver Impedance Adjustment)
• ODT (On-Die Termination)
• Fully differential clock operations (CK & CK)
• Programmable Burst Length 4 / 8 with both
sequential and interleave mode
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial presence detect with EEPROM
• DDR2 SDRAM Package:
60ball FBGA(256Mx8)
• 133.35 x 30.00 mm form factor
• RoHS compliant
ORDERING INFORMATION
Part Name
HMP351U6AFR8C - Y5/S5/S6
HMP351U7AFR8C - Y5/S5/S6
Density
4GB
4GB
Org.
512Mx64
512Mx72
# of
DRAM
s
16
18
# of
ranks
Materials
ECC
2 Halogen-free None
2 Halogen-free ECC
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.1 / Mar 2009
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