HMP351U6AFR8C-Y5 Datasheet, PDF (17/20 Pages) Hynix Semiconductor – 240pin DDR2 SDRAM Unbuffered DIMMs based on 2Gb A version

1240pin DDR2 SDRAM Unbuffered DIMMs
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Parameter
Symbol
DDR2-667
min
max
DDR2-800
min
max
Unit Note
CAS to CAS command delay
tCCD
2
2
tCK
Write recovery time
tWR
15
-
15
-
ns
Auto precharge write recovery + precharge time tDAL
WR+tRP
-
WR+tRP
-
tCK
Internal write to read command delay
tWTR
7.5
-
7.5
-
ns
Internal read to precharge command delay
tRTP
7.5
7.5
ns
tRFC +
Exit self refresh to a non-read command
tXSNR
tRFC + 10
ns
10
Exit self refresh to a read command
tXSRD
200
-
200
-
tCK
Exit precharge power down to any non-read
tXP
command
2
-
2
-
tCK
Exit active power down to read command
tXARD
2
2
tCK
Exit active power down to read command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
Average periodic Refresh Interval
tXARDS
7 - AL
8 - AL
tCK
tCKE
3
3
tCK
tAOND
2
2
2
2
tCK
tAON
tAC(min)
tAC(max)
+0.7
tAC(min)
tAC(max)
+0.7
ns
tAONPD
tAC(min)+2
2tCK+
tAC(max)+1
tAC(min)
+2
2tCK+
tAC(max)+1
ns
tAOFD
2.5
2.5
2.5
2.5
tCK
tAOF
tAC(min)
tAC(max)+
0.6
tAC(min)
tAC(max)
+0.6
ns
tAOFPD
tAC(min)
+2
2.5tCK+ tAC(min) 2.5tCK+
tAC(max)+1 +2 tAC(max)+1
ns
tANPD
3
3
tCK
tAXPD
8
8
tCK
tOIT
0
12
0
12
ns
tDelay tIS+tCK+tIH
tIS+tCK
+tIH
ns
tREFI
-
7.8
-
7.8
us
2
tREFI
-
3.9
-
3.9
us
3
Notes:
1. For details and notes, please refer to the relevant HYNIX component datasheet (HY5PS1G[8,16]31CFP).
2. 0°C ≤ TCASE ≤ 85°C
3. 85°C ＜ TCASE ≤ 95°C
Rev. 0.1 / Mar 2009
17