HY5Y7A2DLM-HF Datasheet, PDF (19/26 Pages) Hynix Semiconductor – 4Banks x 4M x 32bits Synchronous DRAM

Preliminary
HY5Y7A2DLM-HF
4Banks x 4M x 32bits Synchronous DRAM
CAPACITANCE (TA= 25 ^oC, f=1MHz, VDD=3.3V)
Parameter
Input capacitance
Data input / output capaci-
tance
Pin
CLK
A0 ~ A12, BA0, BA1, CKE, CS, RAS,
CAS, WE, DQM0~3
DQ0 ~ DQ31
Note 1.
Symbol
Min
Max Unit
CI1
TBD
TBD
pF
CI2
TBD
TBD
pF
CI/O
TBD
TBD
pF
Vtt=0.5xVDDQ
50Ω
Output
ZO=50Ω
30pF
DC CHARACTERRISTICS I (TA= -25 to 70^oC)
Parameter
Symbol
Min
Input Leakage Current
ILI
-1
Output Leakage Current
ILO
-1
Output High Voltage
VOH
2.4
Output Low Voltage
VOL
-
Note :
1. VIN = 0 to 3.0V. All other pins are not tested under VIN=0V.
2. DOUT is disabled. VOUT= 0 to 3.6V.
3. IOUT = - 0.1mA
4. IOUT = + 0.1mA
Rev. 0.1 / Feb. 2004
Max
1
1
-
0.4
Unit
uA
uA
V
V
Note
1
2
3
4
19