HY5DW283222BF Datasheet, PDF (12/30 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

OPERATION COMMAND TRUTH TABLE - IV
1HY5DW283222BF(P)
Current
State
WRITE
MODE
REGISTER
ACCESSING
/CS /RAS /CAS /WE Address
Command
L
H
L
L
BA, CA, AP WRITE/WRITEAP
L
L
H
H
BA, RA
ACT
L
L
H
L
BA, AP
PRE/PALL
L
L
L
H
X
AREF/SREF
L
L
L
L
OPCODE
MRS
H
X
X
X
X
L
H
H
H
X
DSEL
NOP
L
H
H
L
X
BST
L
H
L
H
BA, CA, AP
READ/READAP
L
H
L
L
BA, CA, AP WRITE/WRITEAP
L
L
H
H
BA, RA
ACT
L
L
H
L
BA, AP
PRE/PALL
L
L
L
H
X
AREF/SREF
L
L
L
L
OPCODE
MRS
Action
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
NOP - Enter IDLE after tMRD
NOP - Enter IDLE after tMRD
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
ILLEGAL¹¹
Note :
1. H - Logic High Level, L - Logic Low Level, X - Don’t Care, V - Valid Data Input,
BA - Bank Address, AP - AutoPrecharge Address, CA - Column Address, RA - Row Address, NOP - NO Operation.
2. All entries assume that CKE was active(high level) during the preceding clock cycle.
3. If both banks are idle and CKE is inactive(low level), then in power down mode.
4. Illegal to bank in specified state. Function may be legal in the bank indicated by Bank Address(BA) depending on the state of
that bank.
5. If both banks are idle and CKE is inactive(low level), then self refresh mode.
6. Illegal if tRCD is not met.
7. Illegal if tRAS is not met.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Illegal if tRRD is not met.
10. Illegal for single bank, but legal for other banks in multi-bank devices.
11. Illegal for all banks.
Rev. 1.1 / May. 2005
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