English
Language : 

HY57V653220BTC Datasheet, PDF (11/12 Pages) Hynix Semiconductor – 4 Banks x 512K x 32Bit Synchronous DRAM
HY57V653220B
COMMAND TRUTH TABLE
Command
Mode Register Set
No Operation
Bank Active
Read
Read with Autoprecharge
Write
Write with Autoprecharge
Precharge All Banks
Precharge selected Bank
Burst Stop
DQM
Auto Refresh
Burst-READ-Single-WRITE
Self Refresh1
Entry
Exit
Precharge power
down
Entry
Exit
Clock
Suspend
Entry
Exit
CKEn-1 CKEn CS
H
X
L
H
H
X
L
H
X
L
H
X
L
H
X
L
H
X
L
H
X
L
H
H
H
L
H
X
L
H
L
L
H
L
H
L
H
H
L
L
H
L
H
L
H
H
L
L
L
H
RAS CAS
WE
DQM ADDR
A10/
AP
BA
L
L
L
X
OP code
X
X
X
X
X
H
H
H
L
H
H
X
RA
V
L
H
L
H
X
CA
V
H
L
H
L
L
X
CA
V
H
H
X
L
H
L
X
X
L
V
H
H
L
X
X
X
V
X
L
L
H
X
X
L
L
L
X
A9 Pin High
(Other Pins OP code)
L
L
H
X
X
X
X
X
X
H
H
H
X
X
X
X
H
H
H
X
X
X
X
X
H
H
H
X
X
X
X
V
V
V
X
X
X
Note
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don′t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
Rev.1.6/Dec. 01
11