HY57V561620C Datasheet, PDF (11/12 Pages) Hynix Semiconductor – 4 Banks x 4M x 16Bit Synchronous DRAM

COMMAND TRUTH TABLE
HY57V561620C(L)T(P)
Command
CKEn-1 CKEn
CS
RAS CAS
WE DQM ADDR
A10/
AP
BA
Note
Mode Register Set
No Operation
Bank Active
H
X
L
L
L
L
X
H
X
X
X
H
X
X
L
H
H
H
H
X
L
L
H
H
X
OP code
X
RA
V
Read
L
H
X
L
H
L
H
X
CA
V
Read with Autoprecharge
H
Write
Write with Autoprecharge
L
H
X
L
H
L
L
X
CA
V
H
Precharge All Banks
Precharge selected Bank
H
X
H
X
L
L
H
L
X
X
L
V
Burst Stop
H
X
L
H
H
L
X
X
DQM
H
X
V
X
Auto Refresh
H
Burst-Read-Single-WRITE
H
Entry
H
Self Refresh¹
Exit
L
Precharge
power down
Entry
H
Exit
L
Clock
Suspend
Entry
H
Exit
L
H
L
L
L
H
X
X
L
L
L
H
X
L
L
L
L
H
X
H
X
X
X
H
X
L
H
H
H
H
X
X
X
L
X
L
H
H
H
H
X
X
X
H
X
L
H
H
H
H
X
X
X
L
X
L
V
V
V
H
X
X
X
A9 Pin High
(Other Pins OP code)
X
X
X
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don′t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
Rev. 0.5 / June 2004
11