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HYMP164S64CP6-C4 Datasheet, PDF (1/23 Pages) Hynix Semiconductor – 1200pin Unbuffered DDR2 SDRAM SO-DIMMs
200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 1Gb version C
This Hynix unbuffered Small Outline Dual In-Line Memory Module(DIMM) series consists of 1Gb version C DDR2
SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 1Gb version C based
Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of indus-
try standard. It is suitable for easy interchange and addition.
FEATURES
• JEDEC standard Double Data Rate 2 Synchronous
DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power
Supply
• All inputs and outputs are compatible with SSTL_1.8
interface
• Posted CAS
• Programmable CAS Latency 3 ,4 ,5, and 6
• OCD (Off-Chip Driver Impedance Adjustment) and
ODT (On-Die Termination)
• Fully differential clock operations (CK & CK)
• Programmable Burst Length 4 / 8 with both
sequential and interleave mode
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial presence detect with EEPROM
• DDR2 SDRAM Package: 60 ball(x8) , 84 ball(x16)
FBGA
• 67.60 x 30.00 mm form factor
• RoHS compliant
ORDERING INFORMATION
Part Name
HYMP164S64CP6-C4/Y5/S5/S6
HYMP164S64CR6-C4/Y5/S5/S6
HYMP112S64CP6-C4/Y5/S5/S6
HYMP112S64CR6-C4/Y5/S5/S6
HYMP125S64CP8-C4/Y5/S5/S6
HYMP125S64CR8-C4/Y5/S5/S6
Density Organization
512MB
512MB
1GB
1GB
2GB
2GB
64Mx64
64Mx64
128Mx64
128Mx64
256Mx64
256Mx64
# of
DRAMs
4
4
8
8
16
16
# of
ranks
1
1
2
2
2
2
Materials
Lead free
Halogen free
Lead free
Halogen free
Lead free
Halogen free
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 1.0 / Dec. 2009
1